DSPIC33FJ64MC804-H/PT Microchip Technology, DSPIC33FJ64MC804-H/PT Datasheet - Page 221
![16-bit DSC, 64KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 TQFP 10x10x1mm TRA](/photos/6/82/68251/c04-076_pt_sml.jpg)
DSPIC33FJ64MC804-H/PT
Manufacturer Part Number
DSPIC33FJ64MC804-H/PT
Description
16-bit DSC, 64KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 TQFP 10x10x1mm TRA
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
Specifications of DSPIC33FJ64MC804-H/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b, D/A 6x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC804-H/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
- Current page: 221 of 436
- Download datasheet (6Mb)
REGISTER 16-11: PxDC1: PWM DUTY CYCLE REGISTER 1
REGISTER 16-12: P1DC2: PWM DUTY CYCLE REGISTER 2
REGISTER 16-13: P1DC3: PWM DUTY CYCLE REGISTER 3
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
PDC1<15:0>: PWM Duty Cycle 1 Value bits
PDC2<15:0>: PWM Duty Cycle 2 Value bits
PDC3<15:0>: PWM Duty Cycle 3 Value bits
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
PDC1<15:8>
PDC2<15:8>
PDC3<15:8>
PDC1<7:0>
PDC2<7:0>
PDC3<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
DS70291E-page 221
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0
bit 8
bit 0
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