DSPIC33FJ64MC706A-I/MR Microchip Technology, DSPIC33FJ64MC706A-I/MR Datasheet - Page 296
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DSPIC33FJ64MC706A-I/MR
Manufacturer Part Number
DSPIC33FJ64MC706A-I/MR
Description
16 Bit MCU/DSP 40MIPS 64KB FLASH 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64MC706A-I/MR
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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dsPIC33FJXXXMCX06A/X08A/X10A
FIGURE 26-12:
TABLE 26-30: QEI INDEX PULSE TIMING REQUIREMENTS
DS70594B-page 296
AC CHARACTERISTICS
TQ50
TQ51
TQ55
Note 1:
Param
No.
2:
QEA
(input)
QEB
(input)
Ungated
Index
Index Internal
Position Counter
Reset
TqiL
TqiH
Tqidxr
Symbol
These parameters are characterized but not tested in manufacturing.
Alignment of index pulses to QEA and QEB is shown for position counter Reset timing only. Shown for
forward direction only (QEA leads QEB). Same timing applies for reverse direction (QEA lags QEB) but
index pulse recognition occurs on falling edge.
Filter Time to Recognize Low
with Digital Filter
Filter Time to Recognize High
with Digital Filter
Index Pulse Recognized to Position
Counter Reset (ungated index)
QEI MODULE INDEX PULSE TIMING CHARACTERISTICS
TQ51
Characteristic
(1)
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
Preliminary
TQ55
3 * N * T
3 * N * T
3 T
Min
CY
CY
CY
TQ50
-40°C T
-40°C T
Max
—
—
—
A
A
+125°C for Extended
+85°C for Industrial
Units
ns
ns
ns
2009 Microchip Technology Inc.
N = 1, 2, 4, 16, 32, 64,
128 and 256 (Note 2)
N = 1, 2, 4, 16, 32, 64,
128 and 256 (Note 2)
Conditions
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