DSPIC33FJ64MC204-E/PT Microchip Technology, DSPIC33FJ64MC204-E/PT Datasheet - Page 289

• Manufacturer Part Number: DSPIC33FJ64MC204-E/PT
• Description: 16-bit DSC, 64KB Flash,Motor, DMA,40 MIPS,nanoWatt 44 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC204-E/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 35
• Interface Type: I2C/SPI/UART
• On-chip Adc: 9-chx10-bit|9-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164335 - MODULE SKT FOR 10X10 PM3 44TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 23-1:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-9
bit 8
bit 7
bit 6-0
DACEN
R/W-0
U-0
—
DACEN: DAC1 Enable bit
1 = Enables module
0 = Disables module
Unimplemented: Read as ‘0’
DACSIDL: Stop in Ideal Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
AMPON: Enable Analog Output Amplifier in Sleep Mode/Stop-in Idle Mode
1 = Analog Output Amplifier is enabled during Sleep Mode/Stop-in Idle mode
0 = Analog Output Amplifier is disabled during Sleep Mode/Stop-in Idle mode
Unimplemented: Read as ‘0’
FORM: Data Format Select bit
1 = Signed integer
0 = Unsigned integer
Unimplemented: Read as ‘0’
DACFDIV<6:0>: DAC Clock Divider
1111111 = Divide input clock by 128
•
•
•
0000101 = Divide input clock by 6 (default)
•
•
•
0000010 = Divide input clock by 3
0000001 = Divide input clock by 2
0000000 = Divide input clock by 1 (no divide)
R/W-0
U-0
—
DAC1CON: DAC CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
DACSIDL
R/W-0
R/W-0
AMPON
R/W-0
R/W-0
Preliminary
DACFDIV<6:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
—
R/W-1
U-0
—
x = Bit is unknown
R/W-0
U-0
—
DS70291D-page 289
FORM
R/W-0
R/W-1
bit 8
bit 0