DSPIC33FJ32MC202-E/MM Microchip Technology, DSPIC33FJ32MC202-E/MM Datasheet - Page 125
![16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC33FJ32MC202-E/MM
Manufacturer Part Number
DSPIC33FJ32MC202-E/MM
Description
16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
4.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
Specifications of DSPIC33FJ32MC202-E/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC202-IMM PDF datasheet #2
- DSPIC33FJ32MC202-IMM PDF datasheet #3
- DSPIC33FJ32MC302-ISO PDF datasheet #4
- Current page: 125 of 436
- Download datasheet (6Mb)
REGISTER 7-26:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10-8
bit 7
bit 6-4
bit 3-0
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
U-0
U-0
—
—
Unimplemented: Read as ‘0’
QEI1IP<2:0>: QEI1 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
PWM1IP<2:0>: PWM1 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
R/W-1
U-0
—
IPC14: INTERRUPT PRIORITY CONTROL REGISTER 14
PWM1IP<2:0>
‘1’ = Bit is set
W = Writable bit
R/W-0
U-0
—
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
R/W-1
U-0
—
QEI1IP<2:0>
x = Bit is unknown
R/W-0
U-0
—
DS70291E-page 125
R/W-0
U-0
—
bit 8
bit 0
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