DSPIC33FJ16MC101-E/SS Microchip Technology, DSPIC33FJ16MC101-E/SS Datasheet - Page 145
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DSPIC33FJ16MC101-E/SS
Manufacturer Part Number
DSPIC33FJ16MC101-E/SS
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in TUB
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ16GP101-IP.pdf
(322 pages)
Specifications of DSPIC33FJ16MC101-E/SS
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 125 C
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
15
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Details
- Current page: 145 of 322
- Download datasheet (5Mb)
REGISTER 12-2:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-2
bit 1
bit 0
Note 1:
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
TON
R/W-0
U-0
—
2:
(2)
When 32-bit timer operation is enabled (T32 = 1) in the Timer Control register (T2CON<3>), the TSIDL bit
must be cleared to operate the 32-bit timer in Idle mode.
When the 32-bit timer operation is enabled (T32 = 1) in the Timer Control (T2CON<3>) register, these bits
have no effect.
TON: Timer3 On bit
1 = Starts 16-bit Timer3
0 = Stops 16-bit Timer3
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue timer operation when device enters Idle mode
0 = Continue timer operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timer3 Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS<1:0>: Timer3 Input Clock Prescale Select bits
11 = 1:256 prescale value
10 = 1:64 prescale value
01 = 1:8 prescale value
00 = 1:1 prescale value
Unimplemented: Read as ‘0’
TCS: Timer3 Clock Source Select bit
1 = External clock from T3CK pin
0 = Internal clock (F
Unimplemented: Read as ‘0’
TGATE
R/W-0
U-0
—
T3CON CONTROL REGISTER
(2)
‘1’ = Bit is set
W = Writable bit
TSIDL
R/W-0
R/W-0
(2)
OSC
TCKPS<1:0>
(1)
/2)
(1)
R/W-0
U-0
(2)
Preliminary
—
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
(2)
(2)
U-0
U-0
—
—
x = Bit is unknown
TCS
R/W-0
U-0
—
(2)
DS70652C-page 145
U-0
U-0
—
—
bit 8
bit 0
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