DSPIC33FJ16GS502-E/SO Microchip Technology, DSPIC33FJ16GS502-E/SO Datasheet - Page 336
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DSPIC33FJ16GS502-E/SO
Manufacturer Part Number
DSPIC33FJ16GS502-E/SO
Description
16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
2.DSPIC33FJ06GS101-ISO.pdf
(18 pages)
3.DSPIC33FJ06GS101-ISO.pdf
(16 pages)
Specifications of DSPIC33FJ16GS502-E/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ16GS502-E/SO
Manufacturer:
Johanson
Quantity:
40 000
- DSPIC33FJ06GS101-ISO PDF datasheet
- DSPIC33FJ06GS101-ISO PDF datasheet #2
- DSPIC33FJ06GS101-ISO PDF datasheet #3
- Current page: 336 of 346
- Download datasheet (6Mb)
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
TABLE A-2:
DS70318D-page 334
Section 8.0 “Oscillator
Configuration”
Section 10.0 “I/O Ports”
Section 15.0 “High-Speed PWM”
Section 16.0 “Serial Peripheral
Interface (SPI)”
Section 18.0 “Universal
Asynchronous Receiver Transmitter
(UART)”
Section 19.0 “High-Speed 10-bit
Analog-to-Digital Converter (ADC)”
Section Name
MAJOR SECTION UPDATES (CONTINUED)
Added Note 2 to the Oscillator System Diagram (see Figure 8-1).
Added a paragraph regarding FRC accuracy at the end of Section 8.1.1
“System Clock Sources”.
Added Note 1 and Note 2 to the OSCON register (see Register ).
Added Note 1 to the OSCTUN register (see Register 8-4).
Added Note 3 to Section 8.4.2 “Oscillator Switching Sequence”.
Removed Table 9-1 and added reference to pin diagrams for I/O pin
availability and functionality.
Added paragraph on ADPCFG register default values to Section 10.2
“Configuring Analog Port Pins”.
Added Note box regarding PPS functionality with input mapping to
Section 10.4.2.1 “Input Mapping”.
Updated Note 2 in the PTCON register (see Register 15-1).
Added Note 4 to the PWMCONx register (see Register 15-6).
Updated Notes for the PHASEx and SPHASEx registers (see Register 15-9
and Register 15-10, respectively).
Added Note 2 and Note 3 to the SPIxCON1 register (see Register 16-2).
Updated the Notes in the UxMode register (see Register 18-1).
Updated the UTXINV bit settings in the UxSTA register and added Note 1
(see Register 18-2).
Updated the SLOWCLK and ADCS<2:0> bit settings and updated Note 1in
the ADCON register (see Register 19-1).
Removed all notes in the ADPCFG register and replaced them with a single
note (see Register 19-4).
Updated the SWTRGx bit settings in the ADCPCx registers (see
Register 19-5, Register 19-6, Register 19-7, and Register 19-8).
Preliminary
Update Description
© 2009 Microchip Technology Inc.
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