DSPIC33FJ16GP102-E/SS Microchip Technology, DSPIC33FJ16GP102-E/SS Datasheet - Page 51
DSPIC33FJ16GP102-E/SS
Manufacturer Part Number
DSPIC33FJ16GP102-E/SS
Description
16-bit DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ16GP101-IP.pdf
(322 pages)
Specifications of DSPIC33FJ16GP102-E/SS
Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP (0.209", 5.30mm Width)
Core
dsPIC
Processor Series
dsPIC33F
Data Bus Width
16 bit
On-chip Adc
Yes
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
A/d Bit Size
10 bit
A/d Channels Available
13
Interface Type
SPI, I2C, UART, JTAG
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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TABLE 4-15:
TABLE 4-16:
TABLE 4-17:
CTMUCON1 033A
CTMUCON2 033C EDG2MOD EDG1POL
CTMUICON
Legend:
ALRMVAL
ALCFGRPT
RTCVAL
RCFGCAL
Legend:
PADCFG1
Legend:
File Name
File Name
File Name
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
033E
Addr
0620
0622
0624
0626
Addr
02FC
CTMU REGISTER MAP
REAL-TIME CLOCK AND CALENDAR REGISTER MAP
PAD CONFIGURATION REGISTER MAP
CTMUEN
ALRMEN
RTCEN
Bit 15
Bit 15
Bit 15
—
CHIME
Bit 14
Bit 14
Bit 14
—
—
—
RTCWREN RTCSYNC HALFSEC
CTMUSIDL TGEN
Bit 13
Bit 13
—
Bit 13
ITRIM<5:0>
Bit 12
Bit 12
—
Bit 12
EDG1SEL<3:0>
AMASK<3:0>
Bit 11
EDGEN EDGSEQEN
Bit 11
Bit 11
—
Bit 10
RTCOE
Bit 10
—
Bit 10
RTCC Value Register Window based on RTCPTR<1:0>
Alarm Value Register Window based on APTR<1:0>
Bit 9
EDG2STAT EDG1STAT EDG2MOD EDG2POL
—
IDISSEN
Bit 9
Bit 9
ALRMPTR<1:0>
RTCPTR<1:0>
IRNG<1:0>
Bit 8
—
CTTRIG
Bit 8
Bit 8
Bit 7
—
Bit 7
Bit 7
—
—
Bit 6
—
Bit 6
Bit 6
Bit 5
—
—
—
Bit 5
Bit 5
Bit 4
—
—
—
Bit 4
ARPT<7:0>
CAL<7:0>
EDG2SEL<3:0>
Bit 4
Bit 3
—
—
—
Bit 3
Bit 3
—
—
Bit 2
—
Bit 2
Bit 2
RTSECSEL
—
—
Bit 1
Bit 1
Bit 1
—
—
—
Bit 0
Bit 0
—
Bit 0
—
—
—
Resets
Resets
Resets
0000
0000
0000
0000
xxxx
0000
xxxx
0000
All
All
All
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