DSPIC33FJ12MC201-E/SS Microchip Technology, DSPIC33FJ12MC201-E/SS Datasheet - Page 49

12 KB Flash, 1 KB RAM, 40 MIPS, 13 I/O, 16-bit Motor Control DSC, NanoWatt 20 SS

DSPIC33FJ12MC201-E/SS

Manufacturer Part Number
DSPIC33FJ12MC201-E/SS
Description
12 KB Flash, 1 KB RAM, 40 MIPS, 13 I/O, 16-bit Motor Control DSC, NanoWatt 20 SS
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC201-E/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TABLE 5-10:
© 2010 Microchip Technology Inc.
Step 1: Exit the Reset vector.
Step 2: Initialize TBLPAG and the read pointer (W0) for TBLRD instruction.
Step 3: Output the VISI register using the REGOUT command.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
SERIAL INSTRUCTION EXECUTION FOR READING THE APPLICATION ID WORD
040200
040200
000000
200800
880190
207F00
207841
000000
BA0890
000000
000000
<VISI>
(Hex)
Data
GOTO
GOTO
NOP
MOV
MOV
MOV
MOV
NOP
TBLRDL [W0], [W1]
NOP
NOP
Clock out contents of the VISI register.
0x200
#0x80, W0
W0, TBLPAG
#0x7FO, W0
#VISI, W1
0x200
Description
DS70152H-page 49

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