DSPIC33FJ128MC802-H/SO Microchip Technology, DSPIC33FJ128MC802-H/SO Datasheet - Page 39
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DSPIC33FJ128MC802-H/SO
Manufacturer Part Number
DSPIC33FJ128MC802-H/SO
Description
16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
Specifications of DSPIC33FJ128MC802-H/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.0
The dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/
X04
features separate program and data memory spaces
and buses. This architecture also allows the direct
access of program memory from the data space during
code execution.
FIGURE 4-1:
© 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
Note:
Note:
and
dsPIC33FJ32MC302/304
MEMORY ORGANIZATION
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(11264 instructions)
This data sheet summarizes the features
of
dsPIC33FJ64MCX02/X04
dsPIC33FJ128MCX02/X04
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 4. “Program
Memory” (DS70203) of the “dsPIC33F/
PIC24H Family Reference Manual”, which
is available from the Microchip web site
(www.microchip.com).
GOTO Instruction
Unimplemented
dsPIC33FJ128MCX02/X04
Reset Address
User Program
Flash Memory
Memory areas are not shown to scale.
(Read ‘0’s)
Registers
Reserved
DEVID (2)
Reserved
Reserved
Reserved
the
PROGRAM MEMORY MAP FOR dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/
X04 AND dsPIC33FJ128MCX02/X04 DEVICES
dsPIC33FJ32MC302/304,
family
architecture
dsPIC33FJ64MCX02/X04
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(22016 instructions)
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
Reserved
and
(Read ‘0’s)
Reserved
DEVID (2)
Reserved
Registers
Reserved
of
4.1
The
dsPIC33FJ32MC302/304,
and
instructions. The space is addressable by a 24-bit
value derived either from the 23-bit Program Counter
(PC) during program execution, or from table operation
or data space remapping as described in
“Interfacing Program and Data Memory
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD/TBLWT operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
The memory map for the dsPIC33FJ32MC302/304,
dsPIC33FJ64MCX02/X04 and dsPIC33FJ128MCX02/
X04 devices is shown in
program
dsPIC33FJ128MCX02/X04
Program Address Space
dsPIC33FJ128MCX02/X04
Alternate Vector Table
address
Interrupt Vector Table
Device Configuration
(44032 instructions)
GOTO Instruction
Reset Address
Unimplemented
User Program
Flash Memory
Reserved
(Read ‘0’s)
Registers
Reserved
DEVID (2)
Reserved
Reserved
Figure
memory
dsPIC33FJ64MCX02/X04
4-1.
devices
DS70291E-page 39
0x0157FE
0x015800
0x0057FE
0x005800
0x00ABFE
0x00AC00
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x7FFFFE
0x800000
0xF7FFFE
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFF0002
0xFFFFFE
0xF80000
space
Section 4.6
Spaces”.
is
of
the
4M
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