DSPIC33EP256MU810-I/PF Microchip Technology, DSPIC33EP256MU810-I/PF Datasheet - Page 116

• Manufacturer Part Number: DSPIC33EP256MU810-I/PF
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PF

• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
4.2.8
The lower half of the base address space range
between 0x0000 and 0x7FFF is always accessible
regardless of the contents of the data space page
registers. It is indirectly addressable through the
register indirect instructions. It can be regarded as
being located in the default EDS page 0 (i.e., EDS
address range of 0x000000 to 0x007FFF with the base
address bit EA<15> = 0 for this address range).
However, page 0 cannot be accessed through upper
32 Kbytes, 0x8000 to 0xFFFF, of base data space in
combination with DSRPAG = 0x00 or DSWPAG =
0x00. Consequently, DSRPAG and DSWPAG are
initialized to 0x001 at Reset.
FIGURE 4-7:
DS70616E-page 116
Conventional
DS Address
Note 1: DSxPAG should not be used to access
2: Clearing DSxPAG in software has no
EXTENDED X DATA SPACE
page 0. An EDS access with DSxPAG set
to 0x000 will generate an Address Error
trap.
effect.
EA<15:0>
0x0000
0x8000
0xFFFF
EDS MEMORY MAP
SFR/DS
DS
(PAGE 0)
Preliminary
PAGE 2
PAGE 1FE
PAGE 1
PAGE 3
PAGE 1FD
PAGE 1FF
The remaining pages including both EDS and PSV
pages are only accessible using the DSRPAG or
DSWPAG registers in combination with the upper
32 Kbytes, 0x8000 to 0xFFFF, of the base address,
where base address bit EA<15> = 1.
For
DSWPAG = 0x01, accesses to the upper 32 Kbytes,
0x8000 to 0xFFFF, of the data space will map to the
EDS address range of 0x008000 to 0x00FFFF.
When DSRPAG = 0x02 or DSWPAG = 0x02,
accesses to the upper 32 Kbytes of the data space
will map to the EDS address range of 0x010000 to
0x017FFF and so on, as shown in the EDS memory
map in
For more information of the PSV page access using
data space page registers refer to 4.5 “Program
Space Visibility from Data Space” in Section 4.
“Program Memory” (DS70613) of the “dsPIC33E/
PIC24E Family Reference Manual”.
example,
Figure
0xFE8000
0xFF0000
0xFF8000
0x008000
0x010000
0x018000
4-7.
 2009-2011 Microchip Technology Inc.
when
DSRPAG
(DSWPAG<8:0>, EA<14:0>)
EDS EA Address (24-bits)
(DSRPAG<8:0>, EA<14:0>)
DSRPAG<9> = 0
=
0x01
or