DSPIC30F2010T-20I/MM Microchip Technology, DSPIC30F2010T-20I/MM Datasheet - Page 7

• Manufacturer Part Number: DSPIC30F2010T-20I/MM
• Description: 16 Bit MCU/DSP 20MIPS 12 KB FLASH 28 QFN-S 6x6mm T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010T-20I/MM

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register 35-3:
© 2008 Microchip Technology Inc.
Upper Byte:
bit 15
bit 15
bit 14
bit 13
bit 12-2
bit 1
bit 0
FRMEN
R/W-0
FRMEN: Framed SPI1 Support bit
1 = Framed SPI1 support is enabled (SS1 pin is used as frame sync pulse input/output)
0 = Framed SPI1 support is disabled
SPIFSD: Frame Sync Pulse Direction Control bit
1 = Frame sync pulse input (slave)
0 = Frame sync pulse output (master)
FRMPOL: Frame Sync Pulse Polarity bit
1 = Frame sync pulse is active-high
0 = Frame sync pulse is active-low
Unimplemented: Read as ‘0’
FRMDLY: Frame Sync Pulse Edge Select bit
1 = Frame sync pulse coincides with first bit clock
0 = Frame sync pulse precedes first bit clock
Unimplemented: This bit must not be set to ‘1’ by the user application
Legend:
R = Readable bit
-n = Value at POR
SPIFSD
R/W-0
SPI1CON2: SPI1 Control Register 2
Lower Byte:
bit 7
Section 35. Serial Peripheral Interface (SPI) (Part II)
U-0
—
FRMPOL
R/W-0
U-0
—
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
—
U-0
—
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
x = Bit is unknown
bit 8
FRMDLY
R/W-0
DS70272B-page 35-7
U-0
—
bit 0
35