DS90LV032AW-QML National Semiconductor, DS90LV032AW-QML Datasheet - Page 5

• Manufacturer Part Number: DS90LV032AW-QML
• Description: LVDS DS90LV032 FLATPAK
• Manufacturer: National Semiconductor

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t
t
t
PHZ
PZH
PZL
Symbol
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device
is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: Derate @ 6.8mW/°C
Note 3: Human body model, 1.5 kΩ in series with 100 pF.
Note 4: Tested during V
Note 5: Chip to chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
Note 6: The VCMR range is reduced for larger V
a common-mode range of 0V to 2.3V. A V
and Differential Pulse skew decrease when V
mode range .
Note 7: Channel-to-Channel Skew, is defined as the difference between the propagation delay of one channel and that of the others on the same chip with any
event on the inputs.
Note 8: Output short circuit current (I
exceed maximum junction temperature.
Note 9: Tested during I
Note 10: FOR ADDITIONAL DIE INFORMATION, PLEASE VISIT THE HI REL WEB SITE AT: www.national.com/analog/space/level_die
Parameter Measurement Information
Disable Time High to Z
Enable Time Z to High
Enable Time Z to Low
OZ
OH
tests by applying appropriate threshold voltage levels to the En and En* pins.
/V
Parameter
OL
tests by applying appropriate voltage levels to the input pins of the device under test.
FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit
FIGURE 2. Receiver Propagation Delay and Transition Time Waveforms
OS
) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not
ID
up to V
ID
is increased from 200mV to 400mV. Skew specifications apply for 200mV
ID
CC
. Example: if V
− 0V may be applied to the R
Input pulse = 0V to 3.0V,
V
R
Input pulse = 0V to 3.0V,
V
R
Input pulse = 0V to 3.0V,
V
R
I
L
I
L
I
L
= 1.5V, V
= 1.5V, V
= 1.5V, V
= 1kΩ.
= 1kΩ.
= 1kΩ.
ID
= 400mV, the VCMR is 0.2V to 2.2V. The fail-safe condition with inputs shorted is valid over
Conditions
O
O
O
= V
= 50%,
= 50%,
OH
4
-0.5V,
IN+
/ R
I−
inputs with the Common-Mode voltage set to V
Fig 3 & 4
Fig 3 & 4
Fig 3 & 4
Notes
20163903
Min
≤
Max
V
20163904
12
20
20
ID
≤
800mV over the common-
CC
Units
ns
ns
ns
/2. Propagation delay
9, 10, 11
9, 10, 11
9, 10, 11
groups
Sub-