CYWUSB6935-48LFXI Cypress Semiconductor Corp, CYWUSB6935-48LFXI Datasheet - Page 21

• Manufacturer Part Number: CYWUSB6935-48LFXI
• Description: IC,Upconverter And Downconverter,LLCC,48PIN,PLASTIC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYWUSB6935-48LFXI

• Frequency: 2.4GHz
• Data Rate - Maximum: 62.5kbps
• Modulation Or Protocol: DSSS, GFSK
• Applications: AMR, ISM, RKE
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.7 V ~ 3.6 V
• Current - Receiving: 57.7mA
• Current - Transmitting: 69.1mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-1626

Table 33. Clock Enable
Table 34. Synthesizer Lock Count
Table 35. Manufacturing ID
Document #: 38-16008 Rev. *E
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
31:30 Address[31:30] These bits are read back as zeroes.
Bit Name
7:0 Count Determines the length of delay in 2-µs increments for the synthesizer to lock when auto synthesizer is enabled via
Bit
7:0 Manual Clock
29:0 Address[29:0]
Bit
Enables
7
7
Address 0x3F
Addr: 0x33
Addr: 0x38
Addr: 0x3C-3F
Name
Control register (0x03, bit 1=0) and not using the PLL lock signal. The default register setting is typically sufficient.
Name
6
6
These bits are the Manufacturing ID (MID) for each IC. The contents of these bits cannot be read unless the
MID Read Enable bit (bit 5) is set in the Analog Control register (Reg 0x20). Enabling the Manufacturing ID
register (Reg 0x3C-0x3F) consumes power. The MID Read Enable bit in the Analog Control register (Reg
0x20, bit 5) should only be set when reading the contents of the Manufacturing ID register (Reg 0x3C-0x3F).
This register is read-only.
This register must be written with 0x41 after reset for correct operation
5
5
Address 0x3E
REG_CLOCK_ENABLE
REG_SYN_LOCK_CNT
Manual Clock Enables
4
4
REG_MID
Count
Description
Description
3
3
Description
Address 0x3D
2
2
8
7
6
1
1
CYWUSB6935
Address 0x3C
Default: 0x00
Default: 0x64
5
4
3
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