CY8C3246PVI-141 Cypress Semiconductor Corp, CY8C3246PVI-141 Datasheet - Page 6

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CY8C3246PVI-141

Manufacturer Part Number
CY8C3246PVI-141
Description
CY8C3246PVI-141
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ 3 CY8C32xxr
Datasheet

Specifications of CY8C3246PVI-141

Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
CapSense, DMA, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 5.5 V
Data Converters
A/D 2x12b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Document Number: 001-56955 Rev. *J
Notes
7. The center pad on the QFN package should be connected to digital ground (Vssd) for best mechanical, thermal, and electrical performance. If not connected to
8. PPins are Do Not Use (DNU) on devices without USB. The pin must be left floating.
ground, it should be electrically floated and not connected to any other signal.
(GPIO, Configurable XRES) P1[2]
(GPIO, TCK, SWDCK) P1[1]
(GPIO, TMS, SWDIO) P1[0]
(GPIO, TDO, SWV) P1[3]
(GPIO, nTRST) P1[5]
(GPIO, TDI) P1[4]
(GPIO) P2[7]
(GPIO) P2[6]
Vboost
Vssb
Vbat
Ind
Figure 2-2. 48-pin QFN Part Pinout
12
10
11
1
2
3
4
5
6
7
8
9
( Top View )
Lines show
Vddio to I/O
supply
association
QFN
36
35
34
33
32
31
30
29
28
27
26
25
P0[2] (GPIO)
P0[3] (Extref0, GPIO)
P0[1] (GPIO)
P0[0] (GPIO)
P12[3] (SIO)
P12[2] (SIO)
Vdda
Vssa
Vcca
P15[3] (GPIO, kHz XTAL: Xi)
P15[2] (GPIO, kHz XTAL: Xo)
P12[1] (SIO, I2C1: SDA)
[8]
PSoC
®
3: CY8C32 Family
Data Sheet
Page 6 of 119
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