CY8C201A0-LDX2I Cypress Semiconductor Corp, CY8C201A0-LDX2I Datasheet
CY8C201A0-LDX2I
Specifications of CY8C201A0-LDX2I
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CY8C201A0-LDX2I Summary of contents
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... CY8C201A0. The user is able to configure registers with parameters needed to adjust the operation and sensitivity of the CapSense system. CY8C201A0 supports a standard I²C serial communi- cation interface that allows the host to configure the device and to read sensor information in real time through easy register access. ...
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... Logic Block Diagram CapSense Express Core 512B SRAM Document Number: 001-17349 Rev Configurable IOs TM 2KB Flash CY8C201A0 Page [+] Feedback ...
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... Active HIGH external reset with internal pull down Configurable as CapSense or GPIO Supply voltage DD Configurable as CapSense or GPIO Integrating Input. The external capacitor is required only if 5:1 SNR is not achieved.Typical range is 1nf to 100nf Configurable as CapSense or GPIO CY8C201A0 GP0[2] XRES GP1[4] GP1[3] Description Page [+] Feedback ...
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... I C data Configurable as CapSense or GPIO Configurable as CapSense or GPIO Ground connection Configurable as CapSense or GPIO Configurable as CapSense or GPIO Configurable as CapSense or GPIO Active HIGH external reset with internal pull down Configurable as CapSense or GPIO Supply voltage DD CY8C201A0 V DD GP0[2] XRES GP1[4] GP1[3] GP1[ GP1[1] Description ...
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... – 0.5 – 0 –25 – +50 mA 2000 – – V Human body model ESD – – 200 mA Min Typ Max Unit -40 – +85 °C -40 – +100 °C CY8C201A0 2 C interface are: AN42137 for details of the software Notes Notes Page [+] Feedback ...
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... 2.0 – – – 140 – mV – 1 – nA Gross tested to 1 µA. CY8C201A0 Notes = 3.0V 25° 2.55V, 0°C < T < 40° 3.3V, –40°C < T < 85° 5.25V, –40°C < T < 85°C A Notes > 3.0V, maximum of DD > 3.0V, maximum of DD > ...
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... V during startup, reset from the XRES pin, or – 2.60 2.65 V reset from Watchdog. 2.39 2.45 2.51 V 2.75 2.92 2.99 V 3.98 4.05 4.12 V CY8C201A0 Notes Notes <3. 3.0 to 3.6V = 3.0 to 3.6V = 2.4 to 3.6V. = 2.4 to 2.7V. = 2.7 to 3.6V Notes Page [+] Feedback ...
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... CY8C201A0 Notes V = 3.0V to 3.6V and 4.75V to 5.25V, DD 10 3.0V to 3.6V, 10 3.0V to 3.6V and 4.75V to 5.25V, DD 10% - 90% Notes V = 2.4V to 3.0V, 10 2.4V to 3.0V, 10 ...
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... Figure 3. Definition for Timing for Fast/Standard Mode on the I Document Number: 001-17349 Rev. *B CY8C201A0 C Bus 2 Page [+] Feedback ...
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... Ordering Information Ordering Code CY8C201A0-LDX2I CY8C201A0-SX2I Thermal Impedances by Package Package 16 QFN 16 SOIC Note + Power x θ Solder Reflow Peak Temperature Package 16 QFN 16 SOIC Note 2. Higher temperatures may be required based on the solder melting point. Typical temperatures for solder are 220 ± 5°C with Sn-Pb or 245 ± 5°C with Sn-Ag-Cu paste ...
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... LG16A LEAD-FREE STANDARD LD16A Document Number: 001-17349 Rev. *B 2.9 0.152 REF. 3.1 0.05 MAX 0.60 MAX SEATING PLANE SIDE VIEW Figure 5. 16 Pin (150-Mil) SOIC (51-85068) CY8C201A0 0.20 min 0.45 0.55 1.5 (NOM PIN #1 ID 0.30 0.18 0.50 1.5 BOTTOM VIEW JEDEC # MO-220 Package Weight: 0 ...
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... Document History Page Document Title: CY8C201A0 CapSense Express™ -10 Configurable IOs with Slider Document Number: 001-17349 Orig. of REV. ECN. Issue Date Change ** 1494145 See ECN TUP/AESA New Datasheet *A 1773608 See ECN TUP/AESA Removed table - 3V DC General Purpose IO Specifications *B 2091026 See ECN ...