CY7C63803-SXCT Cypress Semiconductor Corp, CY7C63803-SXCT Datasheet - Page 47

• Manufacturer Part Number: CY7C63803-SXCT
• Description: CY7C63803-SXCT
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C63803-SXCT

• Controller Type: USB Peripheral Controller
• Interface: PS2, USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.1.2 Timer Capture
Cypress enCoRe II has two 8-bit captures. Each capture has separate registers for the rising and falling time. The two eight bit captures
can be configured as a single 16-bit capture. When configured, the capture 1 registers hold the high order byte of the 16-bit timer
capture value. Each of the four capture registers may be programmed to generate an interrupt when it is loaded.
Table 16-1. Timer Configuration (TMRCR) [0x2A] [R/W]
Document 38-08035 Rev. *N
Bit 7: First Edge Hold
The First Edge Hold function applies to all four capture timers.
0 = The time of the most recent edge is held in the Capture Timer Data Register. If multiple edges have occurred since reading
the capture timer, the time for the most recent one is read.
1 = The time of the first occurrence of an edge is held in the Capture Timer Data Register until the data is read. Subsequent
edges are ignored until the Capture Timer Data Register is read.
Bit [6:4]: 8-bit Capture Prescale [2:0]
This field controls which 8 bits of the 16 Free Running Timer are captured when in bit mode.
0 0 0 = capture timer[7:0]
0 0 1 = capture timer[8:1]
0 1 0 = capture timer[9:2]
0 1 1 = capture timer[10:3]
1 0 0 = capture timer[11:4]
1 0 1 = capture timer[12:5]
1 1 0 = capture timer[13:6]
1 1 1 = capture timer[14:7]
Bit 3: Cap0 16-bit Enable
0 = Capture 0 16-bit mode is disabled
1 = Capture 0 16-bit mode is enabled. Capture 1 is disabled and the Capture 1 rising and falling registers are used as an extension
to the Capture 0 registers–extending them to 16 bits
Bit [2:0]: Reserved
Read/Write
Default
Field
Bit #
First Edge Hold
R/W
7
0
R/W
6
0
8-bit Capture Prescale [2:0]
R/W
5
0
R/W
4
0
Cap0 16bit
Enable
R/W
3
0
CY7C63310, CY7C638xx
2
–
0
Reserved
1
–
0
Page 47 of 86
0
–
0
[+] Feedback