CY7C4245-10AXI Cypress Semiconductor Corp, CY7C4245-10AXI Datasheet - Page 5

• Manufacturer Part Number: CY7C4245-10AXI
• Description: CY7C4245-10AXI
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4245-10AXI

• Function: Synchronous
• Memory Size: 72K (4K x 18)
• Data Rate: 100MHz
• Access Time: 8ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Flag Operation
The CY7C42X5 devices provide five flag pins to indicate the
condition of the FIFO contents. Empty and Full are synchronous.
PAE and PAF are synchronous if V
Full Flag
The Full Flag (FF) will go LOW when device is Full. Write opera-
tions are inhibited whenever FF is LOW regardless of the state
of WEN. FF is synchronized to WCLK, i.e., it is exclusively
updated by each rising edge of WCLK.
Empty Flag
The Empty Flag (EF) will go LOW when the device is empty.
Read operations are inhibited whenever EF is LOW, regardless
of the state of REN. EF is synchronized to RCLK, i.e., it is exclu-
sively updated by each rising edge of RCLK.
Programmable Almost Empty/Almost Full Flag
The CY7C42X5 features programmable Almost Empty and
Almost Full Flags. Each flag can be programmed (described in
the Programming section) a specific distance from the corre-
sponding boundary flags (Empty or Full). When the FIFO
contains the number of words or fewer for which the flags have
been programmed, the PAF or PAE will be asserted, signifying
Table 2. Flag Truth Table
Note
Document Number: 001-45652 Rev. *A
0
1 to n
(n + 1) to 32
33 to (64 − (m + 1))
(64 − m)
64
0
1 to n
(n + 1) to 512
513 to (1024 − (m + 1))
(1024 − m)
1024
2. n = Empty Offset (Default Values: CY7C4425 n = 7, CY7C4205 n = 31, CY7C4215 n = 63, CY7C4225/CY7C4235/CY7C4245 n = 127).
3. m = Full Offset (Default Values: CY7C4425 n = 7, CY7C4205 n = 31, CY7C4215 n = 63, CY7C4225/CY7C4235/CY7C4245 n = 127).
CY7C4425 - 64 x 18
CY7C4225 - 1K x 18
[2]
[2]
[]
to 63
[3]
to 1023
Number of Words in FIFO
Number of Words in FIFO
0
1 to n
(n + 1) to 128
129 to (256 − (m + 1))
(256 − m)
256
0
1 to n
(n + 1) to 1024
1025 to (2048 − (m + 1))
(2048 − m)
2048
CY7C4205 - 256 x 18
CY7C4235 - 2K x 18
[2]
[2]
CC
/SMODE is tied to V
[]
[3]
to 255
to 2047
0
1 to n
(n + 1) to 256
257 to (512 − (m + 1))
(512 − m)
512
0
1 to n
(n + 1) to 2048
2049 to (4096 − (m + 1))
(4096 − m)
4096
SS
CY7C4215 - 512 x 18
.
CY7C4245 - 4K x 18
[2]
[2]
[]
to 511
[3]
that the FIFO is either Almost Full or Almost Empty. See
for a description of programmable flags.
When the SMODE pin is tied LOW, the PAF flag signal transition
is caused by the rising edge of the write clock and the PAE flag
transition is caused by the rising edge of the read clock.
Retransmit
The retransmit feature is beneficial when transferring packets of
data. It enables the receipt of data to be acknowledged by the
receiver and retransmitted if necessary.
The Retransmit (RT) input is active in the standalone and width
expansion modes. The retransmit feature is intended for use
when a number of writes equal to or less than the depth of the
FIFO have occurred since the last RS cycle. A HIGH pulse on
RT resets the internal read pointer to the first physical location of
the FIFO. WCLK and RCLK may be free running but must be
disabled during and tRTR after the retransmit pulse. With every
valid read cycle after retransmit, previously accessed data is
read and the read pointer is incremented until it is equal to the
write pointer. Flags are governed by the relative locations of the
read and write pointers and are updated during a retransmit
cycle. Data written to the FIFO after activation of RT are trans-
mitted also.
The full depth of the FIFO can be repeatedly retransmitted.
to 4095
FF
FF
H
H
H
H
H
H
H
H
H
H
L
L
CY7C4425/4205/4215
CY7C4225/4235/4245
PAF
PAF
H
H
H
H
H
H
H
H
L
L
L
L
HF
HF
H
H
H
H
H
H
L
L
L
L
L
L
PAE
PAE
H
H
H
H
H
H
H
H
L
L
L
L
Page 5 of 22
Table 2
EF
EF
H
H
H
H
H
H
H
H
H
H
L
L
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