CY7C1470V25-200AXC Cypress Semiconductor Corp, CY7C1470V25-200AXC Datasheet - Page 16

CY7C1470V25-200AXC

CY7C1470V25-200AXC

Manufacturer Part Number
CY7C1470V25-200AXC
Description
CY7C1470V25-200AXC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1470V25-200AXC

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
72M (2M x 36)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-2165
CY7C1470V25-200AXC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1470V25-200AXC
Manufacturer:
FREESCALE
Quantity:
101
Part Number:
CY7C1470V25-200AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C1470V25-200AXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Scan Register Sizes
Identification Codes
Document Number: 38-05290 Rev. *L
Instruction
Bypass
ID
Boundary scan order–165-ball FBGA
Boundary scan order–209-ball BGA
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction
Register Name
Code
000
001
010
100
101
011
110
111
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces
all SRAM outputs to high Z state. This instruction is not 1149.1-compliant.
Loads the ID register with the vendor ID code and places the register between TDI and TDO.
This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces
all SRAM output drivers to a high Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Does not
affect SRAM operation. This instruction does not implement 1149.1 preload function and is
therefore not 1149.1-compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
Bit Size (× 36)
32
71
3
1
Description
Bit Size (× 18)
32
52
3
1
Bit Size (× 72)
CY7C1470V25
CY7C1472V25
CY7C1474V25
110
32
3
1
Page 16 of 31
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