CY7C1049D-10VXIT Cypress Semiconductor Corp, CY7C1049D-10VXIT Datasheet - Page 3
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CY7C1049D-10VXIT
Manufacturer Part Number
CY7C1049D-10VXIT
Description
CY7C1049D-10VXIT
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1049D-10VXI.pdf
(10 pages)
Specifications of CY7C1049D-10VXIT
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
4M (512K x 8)
Speed
10ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
36-SOJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Document #: 38-05474 Rev. *D
AC Test Loads and Waveforms
Switching Characteristics
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
Notes:
10. The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t
power
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
4. AC characteristics (except High-Z) for 10-ns parts are tested using the load conditions shown in Figure (a). High-Z characteristics are tested for all speeds using
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
6. t
7. t
8. At any given temperature and voltage condition, t
9. The internal write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a write, and the transition of either of these
the test load shown in Figure (c)
I
signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
Parameter
OL
POWER
HZOE
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
/I
10-ns device
OH
, t
and 30-pF load capacitance.
HZCE
HIGH-Z CHARACTERISTICS
gives the minimum amount of time that the power supply should be at typical V
OUTPUT
OUTPUT
, and t
[9, 10]
INCLUDING
JIG AND
SCOPE
5V
HZWE
V
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
CC
are specified with a load capacitance of 5 pF as in part (c) of AC Test Loads. Transition is measured when the outputs enter a high impedance state.
5 pF
(typical) to the First Access
(c)
Z = 50
R1 481
[5]
Over the Operating Range
[8]
[8]
[7, 8]
(a)
[7, 8]
1.5V
50
[4]
255
HZCE
R2
is less than t
Description
[6]
30 pF*
LZCE
, t
HZOE
is less than t
Equivalent to:
GND
3.0V
CC
LZOE
3 ns
values until the first memory access can be performed.
OUTPUT
, and t
HZWE
HZWE
and t
THÉ
is less than t
SD
.
10%
VENIN EQUIVALENT
90%
ALL INPUT PULSES
167
Min.
100
10
10
3
0
3
7
7
0
0
LZWE
for any given device.
(b)
-10
1.73V
Max.
CY7C1049D
10
10
10
5
5
5
90%
Page 3 of 10
10%
3 ns
Unit
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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