CS8421-DZZR Cirrus Logic Inc, CS8421-DZZR Datasheet - Page 9

• Manufacturer Part Number: CS8421-DZZR
• Description: IC,Digital Audio Sample Rate Converter,CMOS,TSSOP,20PIN
• Manufacturer: Cirrus Logic Inc

Notes: 6. After powering up the CS8421, RST should be held low until the power supplies and clocks are settled.
DS641PP1
Master Mode (Note 9)
I/OSCLK Frequency (non-TDM)
OSCLK Frequency (TDM)
I/OLRCK Duty Cycle
I/OSCLK Duty Cycle
I/OSCLK Falling Edge to I/OLRCK Edge
OSCLK Falling Edge to OLRCK Edge (TDM)
OSCLK Falling Edge to SDOUT Output Valid
SDIN/TDM_IN Setup Time Before I/OSCLK Rising Edge
SDIN/TDM_IN Hold Time After I/OSCLK Rising Edge
I/OSCLK
SDOUT
I/OLRCK
SDIN
(output)
(output)
(input)
(output)
Figure 3. Non-TDM Master Mode Timing
7. The maximum possible sample rate is XTI/128.
8. OLRCK must remain high for at least 8 OSCLK periods in TDM mode.
9. Only the input or the output serial port can be set as master at a given time.
t
lcks
t
dpd
t
ds
Parameters
t
dh
MSB
MSB
MSB-1
MSB-1
TDM_IN
OLRCK
OSCLK
SDOUT
(output)
(output)
(output)
(input)
t
fss
Figure 4. TDM Master Mode Timing
Symbol
t
t
t
t
t
lcks
dpd
fss
ds
dh
t
dpd
Min
45
45
3
5
-
-
-
t
ds
64*Fsi/o
256*Fso
t
dh
MSB
MSB
Max
55
55
5
5
7
-
-
CS8421
MSB-1
MSB-1
Units
MHz
MHz
ns
ns
ns
ns
ns
%
%
9