CS47048C-CQZ Cirrus Logic Inc, CS47048C-CQZ Datasheet - Page 13

IC 4CH ADC 8ch DAC & 32bit DSP

CS47048C-CQZ

Manufacturer Part Number
CS47048C-CQZ
Description
IC 4CH ADC 8ch DAC & 32bit DSP
Manufacturer
Cirrus Logic Inc
Type
Fixed Pointr
Datasheets

Specifications of CS47048C-CQZ

Interface
I²C, SPI
Clock Rate
150MHz
On-chip Ram
128kB
Voltage - I/o
3.30V
Voltage - Core
1.80V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP Exposed Pad, 100-eLQFP, 100-HLQFP
Operating Temperature Range
0°C To +70°C
No. Of Pins
100
Frequency
147MHz
Embedded Interface Type
I2C, SPI
Core Supply Voltage
1.89V
No. Of Mips
150
Digital Ic Case Style
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1539 - BOARD EVAL 4CH ADC/8CH DAC DSP598-1536 - BOARD EVAL 4CH ADC/8CH DAC DSP
Non-volatile Memory
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1657
CS47048B-CQZ

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4.3 On-chip DSP Peripherals
4.3.1 Analog to Digital Converter Port (ADC)
4.3.2 Digital to Analog Converter Port (DAC)
4.3.3 Digital Audio Input Port (DAI)
4.3.4 S/PDIF RX Input Port (DAI)
4.3.5 Digital Audio Output Port (DAO)
4.3.6 S/PDIF TX Output Port (DAO)
DS787PP5
The ADCs in the CS470xx devices feature dynamic range performance in excess of 100 dB.
The DACs in the CS470xx devices feature dynamic range performance in excess of 100 dB.
The input capabilities for each version of the CS470xx are summarized in
Up to five DAI ports are available. Two of the DAI ports can be programmed to implement other
The DAI port PCM inputs have a single slave-only clock domain. The S/PDIF receiver, if used, is a
The DAI also supports a time division multiplexed (TDM) mode that packs up to 10 PCM audio
One of the PCM pins of the DAI can also be used as a DC-coupled, TTL-level S/PDIF Rx input
DAO port supports PCM resolutions of up to 32-bits. The port supports sample rates (Fs) as high
The DAO also supports a time division multiplexed (TDM) mode, that packs up to 8 channels of
Two of the serial audio pins can be re-configured as S/PDIF TX pins that drive a bi-phase encoded
Please see
performance. The CS47024 and CS47028 devices support up to 2 simultaneous channels of
analog-to-digital conversion with the input source selectable using an integrated 5:1 stereo analog
mux (analog inputs AIN_2A/B through AIN_6A/B). The CS47048 device adds a second pair of
ADCs that are directly connected to input pins AIN_1A/B providing a total of 4 simultaneous
channels of analog-to-digital conversion. This feature gives the CS47048 the ability to select from a
total of six stereo pairs of analog input. A single programmable bit selects single-ended or
differential mode signals for all inputs. The conversions are performed with either Fs=96 kHz or
Fs=192 kHz.
Please see
performance. The CS47024 device supports four simultaneous channels of digital-to-analog
conversion. The CS47028 and CS47048 devices provide eight simultaneous channels of digital-to-
analog conversion. The DACs have voltage mode outputs that can be connected either as single-
ended or differential signals. The conversions are performed with Fs=96 kHz.
functions. If the SPI mode is used, the DAI_DATA4 pin becomes the SCP_CS input. The integrated
S/PDIF receiver can be used to takes over the DAI_DATA3 pin.
separate clock domain. The output of the S/PDIF Rx can then be converted through one of the
internal SRC blocks to synchronize with the PCM input. The sample rate of the input clock domains
can be determined automatically by the DSP, off-loading the task of monitoring the S/PDIF Rx from
the host. A time-stamping feature provides the ability to also sample-rate convert the input data via
software.The DAI port supports PCM format with word lengths up to 32 bits and sample rates as
high as 192 kHz.
channels on a single data line.
capable of receiving and demodulating bi-phase encoded S/PDIF signals with Fs
as 192 kHz. The port can be configured as an independent clock domain mastered by the DSP, or
as a clock slave if an external MCLK or SCLK/LRCLK source is available.
PCM audio on a single data line.
S/PDIF signal (data with embedded clock on a single line).
Section 5.16 “ADC Characteristics” on page 27
Section 5.17 “DAC Characteristics” on page 30
Copyright 2011 Cirrus Logic
for more details on CS470xx ADC
for more details on CS470xx DAC
Table 2
Audio SOC Processor Family
CS470xx Data Sheet
and
192 kHz.
Table
3.
13

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