CS4299-BQZR Cirrus Logic Inc, CS4299-BQZR Datasheet - Page 23

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CS4299-BQZR

Manufacturer Part Number
CS4299-BQZR
Description
IC AC97 Codec With SRC
Manufacturer
Cirrus Logic Inc
Datasheet

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Part Number:
CS4299-BQZR
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DS319-BQPP2
4.7
Mute
GN[4:0]
20dB
Default
Mute
D15
Microphone Volume Register (Index 0Eh)
D14
0
D13
0
Microphone Mute. Setting this bit mutes the MIC1 or MIC2 signal. The selection of the MIC1 or
MIC2 input pin is controlled by the MS bit in the General Purpose Register (Index 20h).
Microphone Volume Control. The GN[4:0] bits are used to control the gain level of the Micro-
phone input source to the Input Mixer. Each step corresponds to 1.5 dB gain adjustment, with
01000 = 0 dB. The total range is +12 dB to -34.5 dB gain. See Table 3 for further details.
Microphone 20 dB Boost. When ‘set’, the 20dB bit enables the +20 dB microphone boost block.
This bit allows for variable boost of 0 dB or +20 dB. Table 3 summarizes this behavior.
8008h. This value corresponds to 0 dB gain and Mute ‘set’.
D12
0
D11
0
D10
Table 3. Microphone Input Gain Values
0
GN[4:0]
00000
00001
00111
01000
01001
11111
D9
0
D8
+12.0 dB
+10.5 dB
20dB = 0
-34.5 dB
0
+1.5 dB
-1.5 dB
0.0 dB
Gain Level
D7
0
20dB
20dB = 1
+32.0 dB
+30.5 dB
+21.5 dB
+20.0 dB
+18.5 dB
-14.5 dB
D6
...
...
D5
0
GN4
D4
GN3
D3
GN2
CS4299-BQ
D2
CS4299-BQ
GN1
D1
GN0
D0
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