AM29LV800BT-120EI AMD (ADVANCED MICRO DEVICES), AM29LV800BT-120EI Datasheet - Page 5
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AM29LV800BT-120EI
Manufacturer Part Number
AM29LV800BT-120EI
Description
IC 8MEG FLSH (512KX16) TOP SEC
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AM29LV800BT-120EI.pdf
(49 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29LV800BT-120EI
Manufacturer:
AMD
Quantity:
20 000
Am29LV800B
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
• Single power supply operation
• Manufactured on 0.32 µm process
• High performance
• Ultra low power consumption (typical
• Flexible sector architecture
• Unlock Bypass Program Command
• Top or bottom boot block configurations
This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This
Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
For new designs, S29AL008D supersedes Am29LV800B and is the factory-recommended migration path for this device. Please refer to the S29AL008D Family Datasheet for specifications
and ordering information.
— 2.7 to 3.6 volt read and write operations for
technology
— Compatible with 0.5 µm Am29LV800 device
— Access times as fast as 70 ns
values at 5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 7 mA read current
— 15 mA program/e+5rase current
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
— One 8 Kword, two 4 Kword, one 16 Kword, and
— Supports full chip erase
— Sector Protection features:
— Reduces overall programming time when
available
battery-powered applications
fifteen 64 Kbyte sectors (byte mode)
fifteen 32 Kword sectors (word mode)
A hardware method of locking a sector to prevent
any program or erase operations within that sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
issuing multiple program command sequences
• Embedded Algorithms
• Minimum 1 million write cycle guarantee
• 20-year data retention at 125°C
• Package option
• Compatibility with JEDEC standards
• Data# Polling and toggle bits
• Ready/Busy# pin (RY/BY#)
• Erase Suspend/Erase Resume
• Hardware reset pin (RESET#)
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
per sector
— Reliable operation for the life of the system
— 48-ball FBGA
— 48-pin TSOP
— 44-pin SO
— Known Good Die (KGD)
— Pinout and software compatible with single-
— Superior inadvertent write protection
— Provides a software method of detecting
— Provides a hardware method of detecting
— Suspends an erase operation to read data from,
— Hardware method to reset the device to reading
preprograms and erases the entire chip or any
combination of designated sectors
writes and verifies data at specified addresses
(see publication number 21536)
power supply Flash
program or erase operation completion
program or erase cycle completion
or program data to, a sector that is not being
erased, then resumes the erase operation
array data
Publication# 21490
Issue Date: May 25, 2005
Rev: G Amendment/+5