AM29LV641DL120REI Spansion Inc., AM29LV641DL120REI Datasheet - Page 4

Flash Memory IC

AM29LV641DL120REI

Manufacturer Part Number
AM29LV641DL120REI
Description
Flash Memory IC
Manufacturer
Spansion Inc.

Specifications of AM29LV641DL120REI

Memory Size
64Mbit
Memory Configuration
4M X 16
Ic Interface Type
Parallel
Access Time
120ns
Memory Case Style
TSOP
No. Of Pins
48
Operating Temperature Range
-40°C To +85°C
Termination Type
SMD

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29LV641DL120REI
Manufacturer:
ADM
Quantity:
1 000
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 11
Common Flash Memory Interface (CFI) . . . . . . . 22
Command Definitions . . . . . . . . . . . . . . . . . . . . . 24
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 30
September 20, 2002
Special Handling Instructions for FBGA/fBGA Packages ......... 8
VersatileIO (V
Requirements for Reading Array Data ................................... 11
Writing Commands/Command Sequences ............................ 12
Standby Mode ........................................................................ 12
Automatic Sleep Mode ........................................................... 12
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 13
Autoselect Mode ..................................................................... 17
Sector Group Protection and Unprotection ............................. 18
Write Protect (WP#) ................................................................ 19
Temporary Sector Group Unprotect ....................................... 19
SecSi (Secured Silicon) Sector Flash Memory Region .......... 21
Hardware Data Protection ...................................................... 21
Reading Array Data ................................................................ 24
Reset Command ..................................................................... 25
Autoselect Command Sequence ............................................ 25
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 25
Word Program Command Sequence ..................................... 25
Chip Erase Command Sequence ........................................... 26
Sector Erase Command Sequence ........................................ 27
Erase Suspend/Erase Resume Commands ........................... 27
Command Definitions ............................................................. 29
DQ7: Data# Polling ................................................................. 30
Table 1. Device Bus Operations .....................................................11
Accelerated Program Operation ......................................................12
Autoselect Functions .......................................................................12
Table 2. Sector Address Table ........................................................13
Table 3. Autoselect Codes, (High Voltage Method) .......................17
Table 4. Sector Group Protection/Unprotection Address Table .....18
Figure 1. Temporary Sector Group Unprotect Operation................ 19
Figure 2. In-System Sector Group Protect/Unprotect Algorithms ... 20
Table 5. SecSi Sector Contents ......................................................21
Low VCC Write Inhibit .....................................................................21
Write Pulse “Glitch” Protection ........................................................22
Logical Inhibit ..................................................................................22
Power-Up Write Inhibit ....................................................................22
Table 6. CFI Query Identification String .......................................... 22
System Interface String................................................................... 23
Table 8. Device Geometry Definition .............................................. 23
Table 9. Primary Vendor-Specific Extended Query ........................ 24
Unlock Bypass Command Sequence ..............................................26
Figure 3. Program Operation .......................................................... 26
Figure 4. Erase Operation............................................................... 28
Command Definitions...................................................................... 29
Figure 5. Data# Polling Algorithm ................................................... 30
IO
) Control ..................................................... 11
Am29LV640D/Am29LV641D
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 34
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 34
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Key to Switching Waveforms. . . . . . . . . . . . . . . . 37
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38
Erase And Programming Performance . . . . . . . 49
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 49
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 49
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 50
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 55
RY/BY#: Ready/Busy# ............................................................ 31
DQ6: Toggle Bit I .................................................................... 31
DQ2: Toggle Bit II ................................................................... 32
Reading Toggle Bits DQ6/DQ2 ............................................... 32
DQ5: Exceeded Timing Limits ................................................ 32
DQ3: Sector Erase Timer ....................................................... 32
Read-Only Operations ........................................................... 38
Hardware Reset (RESET#) .................................................... 39
Erase and Program Operations .............................................. 40
Temporary Sector Unprotect .................................................. 45
Alternate CE# Controlled Erase and Program Operations ..... 47
SSO056—56-Pin Shrink Small Outline Package (SSOP) ...... 50
FBE063—63-Ball Fine-Pitch Ball Grid Array
(FBGA) 12 x 11 mm package ................................................. 51
LAA064—64-Ball Fortified Ball Grid Array
(FBGA) 13 x 11 mm package ................................................. 52
TS 048—48-Pin Standard TSOP ............................................ 53
TSR048—48-Pin Reverse TSOP ........................................... 54
Figure 6. Toggle Bit Algorithm........................................................ 31
Table 11. Write Operation Status ................................................... 33
Figure 7. Maximum Negative Overshoot Waveform ..................... 34
Figure 8. Maximum Positive Overshoot Waveform....................... 34
Figure 9. I
Active and Automatic Sleep Currents) ........................................... 36
Figure 10. Typical I
Figure 11. Test Setup.................................................................... 37
Table 12. Test Specifications ......................................................... 37
Figure 12. Input Waveforms and
Measurement Levels...................................................................... 37
Figure 13. Read Operation Timings ............................................... 38
Figure 14. Reset Timings ............................................................... 39
Figure 15. Program Operation Timings.......................................... 41
Figure 16. Accelerated Program Timing Diagram.......................... 41
Figure 17. Chip/Sector Erase Operation Timings .......................... 42
Figure 18. Data# Polling Timings
(During Embedded Algorithms)...................................................... 43
Figure 19. Toggle Bit Timings
(During Embedded Algorithms)...................................................... 44
Figure 20. DQ2 vs. DQ6................................................................. 44
Figure 21. Temporary Sector Group Unprotect Timing Diagram ... 45
Figure 22. Sector Group Protect and Unprotect Timing Diagram .. 46
Figure 23. Alternate CE# Controlled Write
(Erase/Program) Operation Timings .............................................. 48
CC1
Current vs. Time (Showing
CC1
vs. Frequency ............................................ 36
3

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