AM29LV641DH120REI Spansion Inc., AM29LV641DH120REI Datasheet - Page 32

Flash Memory IC

AM29LV641DH120REI

Manufacturer Part Number
AM29LV641DH120REI
Description
Flash Memory IC
Manufacturer
Spansion Inc.
Datasheets

Specifications of AM29LV641DH120REI

Memory Configuration
4M X 16
Ic Interface Type
Parallel
Access Time
120ns
Memory Case Style
TSOP
No. Of Pins
48
Mounting Type
Surface Mount
Peak Reflow Compatible (260 C)
No
Supply Voltage
3V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin
which indicates whether an Embedded Algorithm is in
progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command
sequence. Since RY/BY# is an open-drain output, sev-
eral RY/BY# pins can be tied together in parallel with a
pull-up resistor to V
If the output is low (Busy), the device is actively eras-
ing or programming. (This includes programming in
the Erase Suspend mode.) If the output is high
(Ready), the device is in the read mode, the standby
mode, or the device is in the erase-suspend-read
mode.
Table 11 on page 32
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded
Program or Erase algorithm is in progress or com-
plete, or whether the device has entered the Erase
Suspend mode. Toggle Bit I may be read at any ad-
dress, and is valid after the rising edge of the final
WE# pulse in the command sequence (prior to the
program or erase operation), and during the sector
erase time-out.
During an Embedded Program or Erase algorithm op-
eration, successive read cycles to any address cause
DQ6 to toggle. The system may use either OE# or
CE# to control the read cycles. When the operation is
complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors
selected for erasing are protected, DQ6 toggles for approxi-
mately 100 µs, then returns to reading array data. If not all
selected sectors are protected, the Embedded Erase algo-
rithm erases the unprotected sectors, and ignores the se-
lected sectors that are protected.
The system can use DQ6 and DQ2 together to determine
whether a sector is actively erasing or is erase-suspended.
When the device is actively erasing (that is, the Embedded
Erase algorithm is in progress), DQ6 toggles. When the de-
vice enters the Erase Suspend mode, DQ6 stops toggling.
However, the system must also use DQ2 to determine
which sectors are erasing or erase-suspended. Alterna-
tively, the system can use DQ7 (see the subsection
Data# Polling” on page
If a program address falls within a protected sector,
DQ6 toggles for approximately 1 μs after the program
command sequence is written, then returns to reading
array data.
DQ6 also toggles during the erase-suspend-program
mode, and stops toggling once the Embedded Pro-
gram algorithm is complete.
30
CC
shows the outputs for RY/BY#.
29).
.
Am29LV640D/Am29LV641D
D A T A
“DQ7:
S H E E T
Table 11 on page 32
on DQ6.
gorithm.
tics” section shows the toggle bit timing diagrams.
Figure 20, on page 43
DQ2 and DQ6 in graphical form. See also the subsec-
tion
Note: The system should recheck the toggle bit even if
DQ5 = “1” because the toggle bit may stop toggling as DQ5
changes to “1.” See the subsections on DQ6 and DQ2 for
more information.
“DQ2: Toggle Bit II” on page
No
Figure 19, on page 43
Figure 6, on page 30
Figure 6. Toggle Bit Algorithm
Complete, Write
Reset Command
Read DQ7–DQ0
Read DQ7–DQ0
Read DQ7–DQ0
Program/Erase
Operation Not
Toggle Bit
Toggle Bit
DQ5 = 1?
= Toggle?
= Toggle?
START
Twice
shows the outputs for Toggle Bit I
Yes
Yes
Yes
shows the differences between
22366C6 January 22, 2007
shows the toggle bit al-
in the “AC Characteris-
Operation Complete
31.
No
No
Program/Erase

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