AM29LV040B-70JC Spansion Inc., AM29LV040B-70JC Datasheet - Page 17

• Manufacturer Part Number: AM29LV040B-70JC
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of AM29LV040B-70JC

• Memory Configuration: 512K X 8
• Ic Interface Type: Parallel
• Access Time: 70ns
• Memory Case Style: PLCC
• No. Of Pins: 32
• Mounting Type: Surface Mount
• Peak Reflow Compatible (260 C): No
• Supply Voltage: 3V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed.
Addresses latch on the falling edge of the WE# or CE# pulse,
whichever happens later.
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all command
4. Address bits A18–A11 are don’t cares for unlock and
5. No unlock or command cycles required when reading array
6. The Reset command is required to return to reading array
7. The fourth cycle of the autoselect command sequence is a
8. The data is 00h for an unprotected sector and 01h for a
October 11, 2006 21354E4
Read (Note 5)
Reset (Note 6)
Auto-
select
(Note 7)
Program
Unlock Bypass
Unlock Bypass Program (Note 9)
Unlock Bypass Reset (Note 10)
Chip Erase
Sector Erase
Erase Suspend (Note 11)
Erase Resume (Note 12)
bus cycles are write operations.
command cycles.
data.
data when device is in the autoselect mode, or if DQ5 goes
high (while the device is providing status data).
read cycle.
protected sector. See “Autoselect Command Sequence” for
more information.
Manufacturer ID
Device ID
Sector Protect Verify
(Note 8)
Command
Sequence
(Note 1)
Table 4. Am29LV040B Command Definitions
1
1
4
4
4
4
3
2
2
6
6
1
1
Addr
XXX
XXX
XXX
XXX
XXX
555
555
555
555
555
555
555
RA
First
D A T A
Data
RD
AA
AA
AA
AA
AA
AA
AA
A0
B0
F0
90
30
Am29LV040B
Addr
XXX
2AA
2AA
2AA
2AA
2AA
2AA
2AA
PA
Second
S H E E T
Data
PD
55
55
55
55
55
00
55
55
PD = Data to be programmed at location PA. Data latches on the
rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A18–A13 uniquely select any sector.
9. The Unlock Bypass command is required prior to the Unlock
10. The Unlock Bypass Reset command is required to return to
11. The system may read and program in non-erasing sectors, or
12. The Erase Resume command is valid only during the Erase
Bypass Program command.
reading array data when the device is in the unlock bypass
mode.
enter the autoselect mode, when in the Erase Suspend
mode. The Erase Suspend command is valid only during a
sector erase operation.
Suspend mode.
Addr
555
555
555
555
555
555
555
Bus Cycles (Notes 2-4)
Third
Data Addr
A0
90
90
90
20
80
80
(SA)
X00
X01
X02
555
555
PA
Fourth
Data
PD
AA
AA
4F
01
00
01
Addr Data
2AA
2AA
Fifth
55
55
Addr
555
SA
Sixth
Data
10
30
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