AM29F016D-90EC Spansion Inc., AM29F016D-90EC Datasheet - Page 5

• Manufacturer Part Number: AM29F016D-90EC
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of AM29F016D-90EC

• Memory Configuration: 2M X 8
• Ic Interface Type: Parallel
• Access Time: 90ns
• Memory Case Style: TSOP
• No. Of Pins: 48
• Mounting Type: Surface Mount
• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 5.5V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 8
Common Flash Memory Interface (CFI) . . . . . . . 13
Command Definitions . . . . . . . . . . . . . . . . . . . . . 15
Write Operation Status . . . . . . . . . . . . . . . . . . . . 20
November 2, 2006 21444E6
Requirements for Reading Array Data ..................................... 8
Writing Commands/Command Sequences .............................. 8
Program and Erase Operation Status ...................................... 9
Standby Mode .......................................................................... 9
RESET#: Hardware Reset Pin ................................................. 9
Output Disable Mode................................................................ 9
Autoselect Mode..................................................................... 11
Sector Group Protection/Unprotection.................................... 11
Temporary Sector Group Unprotect ....................................... 11
Hardware Data Protection ...................................................... 12
Reading Array Data ................................................................ 15
Reset Command..................................................................... 15
Autoselect Command Sequence ............................................ 15
Byte Program Command Sequence....................................... 15
Chip Erase Command Sequence ........................................... 16
Sector Erase Command Sequence ........................................ 17
Erase Suspend/Erase Resume Commands........................... 17
Command Definitions ............................................................. 19
Table 1. Am29F016D Device Bus Operations .................................. 8
Table 2. Sector Address Table........................................................ 10
Table 3. Am29F016D Autoselect Codes (High Voltage Method).... 11
Table 4. Sector Group Addresses................................................... 11
Low V
Write Pulse “Glitch” Protection........................................................ 12
Logical Inhibit .................................................................................. 12
Power-Up Write Inhibit .................................................................... 12
Table 5. CFI Query Identification String .......................................... 13
Table 6. System Interface String..................................................... 13
Table 7. Device Geometry Definition .............................................. 14
Table 8. Primary Vendor-Specific Extended Query ........................ 14
Unlock Bypass Command Sequence.............................................. 16
Table 9. Am29F016D Command Definitions................................... 19
Figure 1. Temporary Sector Group Unprotect Operation............... 12
Figure 2. Program Operation ......................................................... 16
Figure 3. Erase Operation.............................................................. 18
CC
Write Inhibit ...................................................................... 12
D A T A
Am29F016D
S H E E T
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 24
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 24
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 25
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Key to Switching Waveforms. . . . . . . . . . . . . . . . 26
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27
Erase and Programming Performance . . . . . . . 36
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 36
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 36
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 37
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 40
DQ7: Data# Polling................................................................. 20
RY/BY#: Ready/Busy#............................................................ 21
DQ6: Toggle Bit I .................................................................... 21
DQ2: Toggle Bit II ................................................................... 21
Reading Toggle Bits DQ6/DQ2............................................... 21
DQ5: Exceeded Timing Limits ................................................ 22
DQ3: Sector Erase Timer ....................................................... 22
TTL/NMOS Compatible .......................................................... 25
CMOS Compatible.................................................................. 25
Read-only Operations............................................................. 27
Erase/Program Operations..................................................... 29
Erase and Program Operations.............................................. 34
TS 040—40-Pin Standard Thin Small Outline Package ......... 37
TS 048—48-Pin Standard Thin Small Outline Package ......... 38
SO 044—44-Pin Small Outline Package ................................ 39
Table 10. Write Operation Status................................................... 23
Table 11. Test Specifications ......................................................... 26
Alternate CE# Controlled Writes .................................................... 34
Figure 4. Data# Polling Algorithm ................................................. 20
Figure 5. Toggle Bit Algorithm....................................................... 22
Figure 6. Maximum Negative Overshoot Waveform ..................... 24
Figure 7. Maximum Positive Overshoot Waveform....................... 24
Figure 8. Test Setup..................................................................... 26
Figure 9. Read Operation Timings ................................................ 27
Figure 10. RESET# Timings ......................................................... 28
Figure 11. Program Operation Timings......................................... 30
Figure 12. Chip/Sector Erase Operation Timings ......................... 31
Figure 13. Data# Polling Timings (During Embedded Algorithms) 32
Figure 14. Toggle Bit Timings (During Embedded Algorithms)..... 32
Figure 15. DQ2 vs. DQ6................................................................ 33
Figure 16. Temporary Sector Group Unprotect Timings ............... 33
Figure 17. Alternate CE# Controlled Write Operation Timings ..... 35
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