ADUM5400CRWZ-RL Analog Devices Inc, ADUM5400CRWZ-RL Datasheet - Page 14

• Manufacturer Part Number: ADUM5400CRWZ-RL
• Description: QUAD-CHANNEL DIGITAL ISOLATORS
• Manufacturer: Analog Devices Inc
• Series: IsoPower®, iCoupler®r

Specifications of ADUM5400CRWZ-RL

• Inputs - Side 1/side 2: 4/0
• Number Of Channels: 4
• Isolation Rating: 2500Vrms
• Voltage - Supply: 3.35V, 4.1V, 5V
• Data Rate: 25Mbps
• Propagation Delay: 45ns
• Output Type: Logic
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUM540XEBZ - BOARD EVAL FOR ADUM540x
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuM5400
Note that in the presence of strong magnetic fields and high
frequencies, any loops formed by PCB traces may induce error
voltages sufficiently large to trigger the thresholds of succeeding
circuitry. Exercise care in the layout of such traces to avoid this
possibility.
POWER CONSUMPTION
The V
data channels, as well as to the power converter. For this reason,
the quiescent currents drawn by the data converter and the
primary and secondary I/O channels cannot be determined
separately. All of these quiescent power demands have been
combined into the I
total I
operating current; the dynamic current, I
the I/O channels; and any external I
Dynamic I/O current is consumed only when operating a channel
at speeds higher than the refresh rate of f
of each channel is determined by its data rate. Figure 10 shows
the current for a channel in the forward direction, meaning that
the input is on the V
The following relationship allows the total I
calculated:
where:
I
I
Figure 10.
I
E is the power supply efficiency at 100 mA load from Figure 4
at the V
The maximum external load can be calculated by subtracting
the dynamic output load from the maximum allowable load.
where:
I
side load.
DD1
CHn
ISO
ISO(LOAD)
is the current drawn by the secondary side external load.
is the total supply input current.
is the current drawn by a single channel determined from
I
I
I
I
DD1(Q)
DD1(D)
DD1
ISO(LOAD)
DD1
DD1
ISO
is the current available to supply an external secondary
= (I
supply current is equal to the sum of the quiescent
power supply input provides power to the iCoupler
Figure 16. Power Consumption Within the ADuM5400
and V
ISO
= I
CONVERTER
4-CHANNEL
× V
PRIMARY
ISO(MAX)
PRIMARY
DD1
I
DATA
DDP(D)
I/O
ISO
DD1(Q)
condition of interest.
DD1
)/(E × V
− Σ I
side of the part.
current, as shown in Figure 16. The
ISO(D)n
E
DD1
) + Σ I
; n = 1 to 4
CONVERTER
SECONDARY
SECONDARY
4-CHANNEL
ISO
DATA
load.
I/O
CHn
I
ISO(D)
r
DD1(D)
. The dynamic current
; n = 1 to 4
DD1
, demanded by
current to be
I
ISO
Rev. 0 | Page 14 of 16
(2)
(1)
I
available at V
I
output channel, as shown in Figure 11.
The preceding analysis assumes a 15 pF capacitive load on
each data output. If the capacitive load is larger than 15 pF,
the additional current must be included in the analysis of I
and I
POWER CONSIDERATIONS
The ADuM5400 power input, the data input channels on the
primary side, and the data output channels on the secondary
side are all protected from premature operation by UVLO
circuitry. Below the minimum operating voltage, the power
converter holds its oscillator inactive, and all input channel
drivers and refresh circuits are idle. Outputs are held in a low
state to prevent transmission of undefined states during power-
up and power-down operations.
During application of power to V
is held idle until the UVLO preset voltage is reached.
The primary side input channels sample the input and send a
pulse to the inactive secondary output. As the secondary side
converter begins to accept power from the primary, the V
voltage starts to rise. When the secondary side UVLO is reached,
the secondary side outputs are initialized to their default low
state until data, either from a logic transition or a dc refresh
cycle, is received from the corresponding primary side input. It
can take up to 1 μs after the secondary side is initialized for the
state of the output to correlate to the primary side input.
The dc-to-dc converter section goes through its own power-up
sequence. When UVLO is reached, the primary side oscillator
also begins to operate, transferring power to the secondary power
circuits. The secondary V
this point; the regulation control signal from the secondary is
not being generated. The primary side power oscillator is allowed
to free run in this circumstance, supplying the maximum amount
of power to the secondary, until the secondary voltage rises to its
regulation setpoint. This creates a large inrush current transient
at V
control circuit produces the regulation control signal that mod-
ulates the oscillator on the primary side. The V
reduced and is then proportional to the load current. The
inrush current is less than the short-circuit current shown in
Figure 7. The duration of the inrush depends on the V
conditions and the current available at the V
Because the rate of charge of the secondary side is dependent on
load conditions, the input voltage, and the output voltage level
selected, ensure that the design allows the converter to stabilize
before valid data is required.
ISO(MAX)
ISO(D)n
DD1
ISO(LOAD)
is the dynamic load current drawn from V
. When the regulation point is reached, the regulation
is the maximum external secondary side load current
.
ISO
.
ISO
voltage is below its UVLO limit at
DD1
, the primary side circuitry
DD1
DD1
pin.
ISO
current is
by an
ISO
load
ISO
DD1