ADUM1510BRWZ-RL Analog Devices Inc, ADUM1510BRWZ-RL Datasheet - Page 3

• Manufacturer Part Number: ADUM1510BRWZ-RL
• Description: 5 - CH UNIDIRECTIONAL DIGITAL ISOLATORS
• Manufacturer: Analog Devices Inc
• Series: iCoupler®r

Specifications of ADUM1510BRWZ-RL

• Inputs - Side 1/side 2: 5/0
• Number Of Channels: 5
• Isolation Rating: 2500Vrms
• Voltage - Supply: 4.5 V ~ 5.5 V
• Data Rate: 10Mbps
• Propagation Delay: 30ns
• Output Type: Logic
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ V
over the entire recommended operation range, unless otherwise noted; all typical specifications are at T
Table 1.
Parameter
DC SPECIFICATIONS
SWITCHING SPECIFICATIONS
1
2
3
4
5
6
7
8
Supply current values are for all five channels combined running at identical data rates. Output supply current values are specified with no output load present. The
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. Operation below the minimum pulse width is not
recommended.
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
t
measured from the 50% level of the rising edge of the V
t
load within the recommended operating conditions.
Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels within the same component.
CM
that can be sustained while maintaining V
transient magnitude is the range over which the common mode is slewed.
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See
supply current associated with an individual channel operating at a given data rate is calculated as described in the
Figure 6
and I
mation on the per-channel supply current as a function of the data rate for unloaded and loaded conditions. See the P
calculating the per-channel supply current for a given data rate.
PHL
PSK
Input Quiescent Supply Current per Channel
Output Quiescent Supply Current per Channel I
Total Supply Current, Five Channels
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching
Output Rise/Fall Time (10% to 90%)
Common-Mode Transient Immunity at
Common-Mode Transient Immunity at
Refresh Rate
Input Dynamic Supply Current per Channel
Output Dynamic Supply Current per Channel
H
is the magnitude of the worst-case difference in t
propagation delay is measured from the 50% level of the falling edge of the V
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
V
V
V
V
Change vs. Temperature
Logic High Output
Logic Low Output
DD2
DD1
DD2
DD1
DD2
supply currents as a function of the data rate for the ADuM1510.
for information on the per-channel supply current as a function of the data rate for unloaded and loaded conditions. See
Supply Current, Quiescent
Supply Current, Quiescent
Supply Current, 10 Mbps Data Rate
Supply Current, 10 Mbps Data Rate
4
7
3
7
2
5
PLH
− t
PHL
6
|
4
Ox
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The
1
PHL
8
and/or t
8
Ix
signal to the 50% level of the rising edge of the V
Symbol
I
I
I
I
I
I
V
V
V
V
V
V
V
PW
t
PWD
t
t
t
|CM
|CM
f
I
I
DDI (Q)
DDO (Q)
DD1 (Q)
DD2 (Q)
DD1 (10)
DD2 (10)
IA
DDI (D)
DDO (D)
r
PHL
PSK
PSKCD
R
IH
IL
OAH
OCH
OEH
OAL
OCL
/t
, I
PLH
, t
F
IB
, V
, V
H
L
, V
, V
, I
|
|
PLH
that is measured between units at the same operating temperature, supply voltages, and output
IC
OBL
ODL
OBH
ODH
, I
,
, V
ID
,
,
DD1
, I
Rev. A | Page 3 of 12
OEL
IE
≤ 5.5 V, 4.5 V ≤ V
Min
−10
0.8
V
10
20
25
25
DD2
Ix
signal to the 50% level of the falling edge of the V
− 0.4 4.8
Typ
0.40
0.30
2.0
1.5
7.5
3.1
+1
0.2
30
5
2.5
35
35
1.0
0.122
0.036
Ox
DD2
> 0.8 × V
≤ 5.5 V; all minimum/maximum specifications apply
Max
0.80
0.50
4.0
2.5
12.0
4.5
+10
2.0
0.4
100
50
5
30
5
Ox
DD2
signal.
. CM
Unit
mA
mA
mA
mA
mA
mA
μA
V
V
V
V
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
kV/μs
kV/μs
Mbps
mA/Mbps
mA/Mbps
L
Power Consumption
is the maximum common-mode voltage slew rate
ower Consumption
A
= 25°C, V
Figure 4
Test Conditions
V
V
5 MHz logic signal frequency
5 MHz logic signal frequency
V
I
I
C
C
C
C
C
C
C
C
V
transient magnitude = 800 V
V
transient magnitude = 800 V
Ox
Ox
Figure 7
IA
IA
IA
L
L
L
L
L
L
L
L
Ix
Ix
, V
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= −4 mA, V
= +4 mA, V
= V
= 0 V, V
Ox
= V
= V
IB
signal. t
through
, V
DD1
IB
IB
section. See Figur
section for guidance on
DD1
= V
= V
and
IC
/V
, V
CM
DD2
IC
IC
PLH
= V
Figure 8
ID
= 1000 V,
= V
= V
Figure 6
, V
Ix
Ix
propagation delay is
, V
ADuM1510
= V
= V
DD2
IE
CM
ID
ID
≥ 0 V
= V
= V
IH
IL
= 1000 V,
= 5 V.
for total I
for infor-
IE
IE
e 4
= 0 V
= 0 V
through
DD1