ADUC7021BCPZ62I-RL Analog Devices Inc, ADUC7021BCPZ62I-RL Datasheet - Page 68
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ADUC7021BCPZ62I-RL
Manufacturer Part Number
ADUC7021BCPZ62I-RL
Description
IC,MICROCONTROLLER,16-BIT,ARM7 CPU,CMOS,LLCC,40PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.USB-I2CLIN-CONV-Z.pdf
(96 pages)
Specifications of ADUC7021BCPZ62I-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
44MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
PLA, PWM, PSM, Temp Sensor, WDT
Number Of I /o
13
Program Memory Size
62KB (62K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuC7019/20/21/22/24/25/26/27/28/29
Table 107. COMSTA1 MMR Bit Descriptions
Bit
7
6
5
4
3
2
1
0
Table 108. COMSCR Register
Name
COMSCR
COMSCR is an 8-bit scratch register used for temporary
storage. It is also used in network addressable UART mode.
Table 109. COMDIV2 Register
Name
COMDIV2
COMDIV2 is a 16-bit fractional baud divide register.
Table 110. COMDIV2 MMR Bit Descriptions
Bit
15
14:13
12:11
10:0
Network Addressable UART Mode
This mode connects the MicroConverter to a 256-node serial
network, either as a hardware single master or via software in a
multimaster network. Bit 7 (ENAM) of the COMIEN1 register
must be set to enable UART in network addressable mode (see
Table 112). Note that there is no parity check in this mode.
Name
DCD
RI
DSR
CTS
DDCD
TERI
DDSR
DCTS
Name
FBEN
FBM[1:0]
FBN[10:0]
Description
Data carrier detect.
Ring indicator.
Data set ready.
Clear to send.
Delta DCD. Set automatically if DCD changed
state since last COMSTA1 read. Cleared automati-
cally by reading COMSTA1.
Trailing edge RI. Set if RI changed from 0 to 1
since COMSTA1 was last read. Cleared
automatically by reading COMSTA1.
Delta DSR. Set automatically if DSR changed state
since COMSTA1 was last read. Cleared
automatically by reading COMSTA1.
Delta CTS. Set automatically if CTS changed state
since COMSTA1 was last read. Cleared
automatically by reading COMSTA1.
Address
0xFFFF071C
Address
0xFFFF072C
Description
Fractional baud rate generator enable bit.
Set by user to enable the fractional baud
rate generator. Cleared by user to generate
baud rate using the standard 450 UART
baud rate generator.
Reserved.
M if FBM = 0, M = 4 (see the Fractional
Divider section).
N (see the Fractional Divider section).
Default Value
0x00
Default Value
0x0000
Access
R/W
Access
R/W
Rev. C | Page 68 of 96
Network Addressable UART Register Definitions
Four additional registers, COMIEN0, COMIEN1, COMIID1, and
COMADR are used in network addressable UART mode only.
In network address mode, the least significant bit of the COMIEN1
register is the transmitted network address control bit. If set to
1, the device is transmitting an address. If cleared to 0, the
device is transmitting data. For example, the following master-
based code transmits the slave’s address followed by the data:
E9BT, E9BR, ETD, NABP
wait for adr tx to finish.
to indicate Data is coming
Table 111. COMIEN1 Register
Name
COMIEN1
COMIEN1 is an 8-bit network enable register.
Table 112. COMIEN1 MMR Bit Descriptions
Bit
7
6
5
4
3
2
1
0
Table 113. COMIID1 Register
Name
COMIID1
COMIID1 is an 8-bit network interrupt register. Bit 7 to Bit 4
are reserved (see Table 114).
COMIEN1
COMTX = 0xA0;
while(!(0x020==(COMSTA0 & 0x020))){} //
COMIEN1
COMTX = 0x55; // Tx data to slave: 0x55
Name
ENAM
E9BT
E9BR
ENI
E9BD
ETD
NABP
NAB
Address
0xFFFF0720
Address
0xFFFF0724
Description
Network address mode enable bit. Set by user to
enable network address mode. Cleared by user to
disable network address mode.
9-bit transmit enable bit. Set by user to enable
9-bit transmit. ENAM must be set. Cleared by user
to disable 9-bit transmit.
9-bit receive enable bit. Set by user to enable
9-bit receive. ENAM must be set. Cleared by user
to disable 9-bit receive.
Network interrupt enable bit.
Word length. Set for 9-bit data. E9BT has to be
cleared. Cleared for 8-bit data.
Transmitter pin driver enable bit. Set by user to
enable SOUT pin as an output in slave mode or
multimaster mode. Cleared by user; SOUT is
three-state.
Network address bit. Interrupt polarity bit.
Network address bit (if NABP = 1). Set by user to
transmit the slave address. Cleared by user to
transmit data.
= 0xE7;
= 0xE6;
// Slave address is 0xA0
Default Value
0x04
Default Value
0x01
//Setting ENAM,
//
Clear NAB bit
Access
R/W
Access
R