ADSP-2187LBSTZ-210 Analog Devices Inc, ADSP-2187LBSTZ-210 Datasheet - Page 28
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ADSP-2187LBSTZ-210
Manufacturer Part Number
ADSP-2187LBSTZ-210
Description
IC,DSP,16-BIT,CMOS,QFP,100PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet
1.ADSP-2184LBSTZ-160.pdf
(48 pages)
Specifications of ADSP-2187LBSTZ-210
Interface
Host Interface, Serial Port
Clock Rate
52MHz
Non-volatile Memory
External
On-chip Ram
160kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADSP-2187LBSTZ210
ADSP-2187LBSTZ210
ADSP-2187LBSTZ210
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-2187LBSTZ-210
Manufacturer:
ANALOG
Quantity:
45
Company:
Part Number:
ADSP-2187LBSTZ-210
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADSP-2187LBSTZ-210
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
Serial Ports
Table 19. Serial Ports
1
2
3
Parameter
Timing Requirements:
t
t
t
t
Switching Characteristics:
t
t
t
t
t
t
t
t
t
t
For the ADSP-2187L, this specification is 38 ns min.
For the ADSP-2187L, this specification is 7 ns min.
For the ADSP-2185L, and the ADSP-2187L, this specification is 15 ns min.
SCK
SCS
SCH
SCP
CC
SCDE
SCDV
RH
RD
SCDH
TDE
TDV
SCDD
RDV
SCLK Period
DR/TFS/RFS Setup Before SCLK Low
DR/TFS/RFS Hold After SCLK Low
SCLKIN Width
CLKOUT High to SCLKOUT
SCLK High to DT Enable
SCLK High to DT Valid
TFS/RFS
TFS/RFS
DT Hold after SCLK High
TFS (Alt) to DT Enable
TFS (Alt) to DT Valid
SCLK High to DT Disable
RFS (Multichannel, Frame Delay Zero) to DT Valid
OUT
OUT
Hold After SCLK High
Delay from SCLK High
1
3
2
Rev. C | Page 28 of 48 | January 2008
Min
50
4
8
20
0.25t
0
0
0
0
CK
Max
0.25t
15
15
14
15
15
CK
+ 10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns