ADP1871ACPZ-1.0-R7 Analog Devices Inc, ADP1871ACPZ-1.0-R7 Datasheet - Page 26

• Manufacturer Part Number: ADP1871ACPZ-1.0-R7
• Description: 1.0MHz, Light Load Eff Enabled
• Manufacturer: Analog Devices Inc

Specifications of ADP1871ACPZ-1.0-R7

• Frequency - Max: 1MHz
• Pwm Type: Current Mode
• Number Of Outputs: 1
• Duty Cycle: 45%
• Voltage - Supply: 2.95 V ~ 20 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 10-WFDFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADP1871ACPZ-1.0-R7; ADP1871ACPZ-1.0-R7TR

ADP1870/ADP1871
EFFICIENCY CONSIDERATIONS
One of the important criteria to consider in constructing a dc-to-dc
converter is efficiency. By definition, efficiency is the ratio of the
output power to the input power. For high power applications at
load currents up to 20 A, the following are important MOSFET
parameters that aid in the selection process:
•
•
•
•
•
The following are the losses experienced through the external
component during normal switching operation:
•
•
•
•
•
Channel Conduction Loss
During normal operation, the bulk of the loss in efficiency is due
to the power dissipated through MOSFET channel conduction.
Power loss through the upper-side MOSFET is directly pro-
portional to the duty cycle (D) for each switching period, and
the power loss through the lower-side MOSFET is directly
proportional to 1 − D for each switching period. The selection
of MOSFETs is governed by the amount of maximum dc load
current that the converter is expected to deliver. In particular,
the selection of the lower-side MOSFET is dictated by the
maximum load current because a typical high current application
employs duty cycles of less than 50%. Therefore, the lower-side
MOSFET is in the on state for most of the switching period.
MOSFET Driver Loss
Other dissipative elements are the MOSFET drivers. The con-
tributing factors are the dc current flowing through the driver
during operation and the Q
where:
C
C
I
V
(V
V
f
1.0 MHz)
BIAS
SW
upperFET
lowerFET
DR
REG
REG
is the controller switching frequency (300 kHz, 600 kHz, and
is the dc current flowing into the upper- and lower-side drivers.
is the driver bias voltage (that is, the low input voltage
V
the gate and the source
R
conduction
Q
C
C
Channel conduction loss (both of the MOSFETs)
MOSFET driver loss
MOSFET switching loss
Body diode conduction loss (lower-side MOSFET)
Inductor loss (copper and core loss)
is the bias voltage.
[
P
P
) minus the rectifier drop (see Figure 81)).
V
DS (ON)
N1
N2
GS (TH)
G
N1,N2(CL)
DR
REG
: the total gate charge
is the input gate capacitance of the lower-side MOSFET.
is the input gate capacitance of the upper-side MOSFET.
: the input capacitance of the upper-side switch
: the input capacitance of the lower-side switch
(
LOSS
×
: the MOSFET threshold voltage applied between
: the MOSFET on resistance during channel
(
)
f
=
=
SW
[
[
D
V
C
DR
×
lowerFET
R
×
N1(ON)
(
GATE
f
SW
V
REG
parameter of the external MOSFETs.
C
+
upperFET
(
1
+
−
I
BIAS
D
V
)
×
DR
)
]
R
+
N2(ON)
I
BIAS
]
×
)
]
I
+
2
LOAD
Rev. A | Page 26 of 44
Switching Loss
The SW node transitions due to the switching activities of the
upper- and lower-side MOSFETs. This causes removal and
replenishing of charge to and from the gate oxide layer of the
MOSFET, as well as to and from the parasitic capacitance
associated with the gate oxide edge overlap and the drain and
source terminals. The current that enters and exits these charge
paths presents additional loss during these transition times. This
loss can be approximately quantified by using the following
equation, which represents the time in which charge enters and
exits these capacitive regions:
where:
C
R
The ratio of this time constant to the period of one switching cycle
is the multiplying factor to be used in the following expression:
or
TOTAL
GATE
t
Figure 81. Internal Rectifier Voltage Drop vs. Switching Frequency
P
P
SW-TRANS
is the gate input resistance of the external MOSFET.
800
720
640
560
480
400
320
240
160
SW
SW
is the C
80
300
(
(
LOSS
LOSS
)
)
= R
=
=
GD
400
t
f
GATE
V
V
V
+ C
SW
SW
REG
REG
REG
t
-
SW
TRANS
×
× C
GS
= 2.7V
= 3.6V
= 5.5V
SWITCHING FREQUENCY (kHz)
500
R
of the external MOSFET.
GATE
TOTAL
×
I
×
LOAD
600
C
TOTAL
×
V
700
IN
×
I
×
LOAD
2
800
×
V
IN
×
900
2
+125°C
+25°C
–40°C
1000