ADM8690AN Analog Devices Inc, ADM8690AN Datasheet - Page 16

• Manufacturer Part Number: ADM8690AN
• Description: IMPROVED ADM690
• Manufacturer: Analog Devices Inc
• Type: Battery Backup Circuitr

Specifications of ADM8690AN

• Rohs Compliant: NO
• Rohs Status: RoHS non-compliant
• Number Of Voltages Monitored: 1
• Output: Push-Pull, Totem Pole
• Reset: Active Low
• Reset Timeout: 35 ms Minimum
• Voltage - Threshold: 4.65V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)

ADM8690/ADM8691/ADM8692/ADM8693/ADM8694/ADM8695
TYPICAL APPLICATIONS
ADM8690, ADM8692, AND ADM8694
Figure 30 shows the ADM8690/ADM8692/ADM8694 in a
typical power monitoring, battery backup application. V
powers the CMOS RAM. Under normal operating conditions
with V
failure occurs, V
maintaining power for the CMOS RAM. A RESET pulse is also
generated when V
ADM8694 or 4.4 V for the ADM8692. RESET remains low for
50 ms (200 ms for the ADM8694) after V
The watchdog timer input (WDI) monitors an input/output line
from the microprocessor system. This line must be toggled once
every 1.6 seconds to verify correct software execution. Failure to
toggle the line indicates that the microprocessor system is not
correctly executing its program and can be tied up in an endless
loop. If this happens, a reset pulse is generated to initialize the
microprocessor.
If the watchdog timer is not needed, the WDI input should be
left floating.
The power-fail input, PFI, monitors the input power supply via
a resistive divider network. The voltage on the PFI input is
compared with a precision 1.3 V internal reference. If the input
voltage drops below 1.3 V, a power-fail output ( PFO ) signal is
generated. This warns of an impending power failure and can
be used to interrupt the processor so that the system can be shut
down in an orderly fashion. The resistors in the sensing
network are ratioed to give the desired power-fail threshold
voltage (V
BATTERY
Figure 31 shows a similar application, but in this case the PFI
input monitors the unregulated input to the 7805 voltage
regulator. This gives an earlier warning of an impending power
failure. It is useful with processors operating at low speeds or
where there are a significant number of housekeeping tasks to
be completed before the power is lost.
5V
Figure 30. ADM8690/ADM8692/ADM8694 Typical Application Circuit A
V
R1/R2 = (V
R
R
1
2
T
CC
+
= (1.3 R1/R2) + 1.3 V
present, V
T
).
PFI
V
ADM8690/
ADM8692/
BATT
ADM8694
T
CC
/1.3) − 1
GND
CC
V
decays and V
CC
OUT
falls below 4.65 V for the ADM8690/
RESET
V
PFO
WDI
is internally connected to V
OUT
0.1µF
OUT
is switched to V
CMOS RAM
POWER
RESET
NMI
I/O LINE
MICROPROCESSOR
CC
returns to 5 V.
SYSTEM
POWER
CC
BATT
. If a power
, thereby
OUT
Rev. A | Page 16 of 20
POWER
ADM8691, ADM8693, AND ADM8695
A typical connection for the ADM8691/ADM8693/ADM8695
is shown in Figure 32. CMOS RAM is powered from V
When 5 V power is present, this is routed to V
V
V
can be added. When V
output goes low, providing up to 25 mA of base drive for the
external transistor. A 0.1 μF capacitor is connected to V
supply the transient currents for CMOS RAM. When V
lower than V
backup battery to V
INPUT POWER
5V
RESET OUTPUT
The internal voltage detector monitors V
RESET output to hold the microprocessor reset line low when
V
holds RESET low for 50 ms (200 ms for the ADM8695) after
V
repeated toggling of RESET , even if the 5 V power drops out
and recovers with each power line cycle.
The crystal oscillator normally used to generate the clock for
microprocessors can take several milliseconds to stabilize.
Because most microprocessors need several clock cycles to
reset, RESET must be held low until the microprocessor clock
oscillator has started. The power-up RESET pulse lasts 50 ms
R
R
V > 8V
INPUT
1
2
BATT
CC
CC
CC
Figure 31. ADM8690/ADM8692/ADM8694 Typical Application Circuit B
BATTERY
, but if more current is required, an external PNP transistor
is below 4.65 V (4.4 V for ADM8693). An internal timer
rises above 4.65 V (4.4 V for the ADM8693). This prevents
BATTERY
3V
is routed to V
NC
Figure 32. ADM8691/ADM8693/ADM8695 Typical Application
R
R
1
2
0.1µF
7805
+
BATT
V
PFI
GND
OSC IN
OSC SEL
BATT
, an internal 20 Ω MOSFET connects the
V
LOW LINE
PFI
V
CC
ADM8691/
ADM8693/
SYSTEM STATUS
ADM8695
ADM8690/
ADM8692/
BATT
ADM8694
INDICATORS
OUT
OUT
V
GND
BATT
ON
CC
. V
CC
.
5V
RESET
V
WDO
is higher than V
WDI
OUT
PFO
RESET
OUT
CE
V
CE
PFO
WDI
OUT
OUT
can supply up to 100 mA from
IN
0.1µF
0.1µF
RESET
0.1µF
ADDRESS
DECODE
CMOS
CMOS RAM
POWER
RESET
NMI
I/O LINE
RAM
CC
BATT
MICROPROCESSOR
0.1µF
and generates a
, the BATT ON
OUT
SYSTEM
MICROPROCESSOR
POWER
I/O LINE
NMI
RESET
. If V
A0 TO 15
SYSTEM
CC
OUT
OUT
CC
fails,
.
is
to