ADG658YRUZ-REEL7 Analog Devices Inc, ADG658YRUZ-REEL7 Datasheet - Page 11

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ADG658YRUZ-REEL7

Manufacturer Part Number
ADG658YRUZ-REEL7
Description
8:1 MUX, +/-5V Supply Rate To +125? I.C.
Manufacturer
Analog Devices Inc
Type
Analog Multiplexerr
Datasheet

Specifications of ADG658YRUZ-REEL7

Function
Multiplexer
Circuit
1 x 8:1
On-state Resistance
75 Ohm
Voltage Supply Source
Single, Dual Supply
Voltage - Supply, Single/dual (±)
2 V ~ 12 V, ±2 V ~ 6 V
Current - Supply
0.01µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Package
16TSSOP
Maximum On Resistance
300@3.6V Ohm
Maximum Propagation Delay Bus To Bus
115@±5V|200@5V|370@3.6V ns
Maximum High Level Output Current
20 mA
Multiplexer Architecture
8:1
Maximum Turn-off Time
80@3.6V ns
Maximum Turn-on Time
370@3.6V ns
Power Supply Type
Single|Dual
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity:
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 7. Pin Function Descriptions
Parameter
V
V
I
I
GND
S
D
A
EN
V
R
∆R
R
I
I
I
V
V
I
C
C
C
C
DD
SS
S
D
D
INL
DD
SS
D
ON
FLAT(ON)
INL
INH
S
D
D
IN
X
, I
(OFF)
(OFF)
, C
ON
(OFF)
(V
(I
(OFF)
S
(ON)
INH
S
S
)
(ON)
)
Description
Most Positive Power Supply Potential.
Most Negative Power Supply Potential.
Positive Supply Current.
Negative Supply Current.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Active Low Digital Input. When high, device is disabled and all switches are OFF. When low, A
switch.
Analog Voltage on Terminals D, S.
Ohmic Resistance between D and S.
On Resistance Match between Any Two Channels, i.e., R
Flatness is defined as the difference between the maximum and minimum value of ON Resistance as measured over the
specified analog signal range.
Source Leakage Current with the Switch OFF.
Drain Leakage Current with the Switch OFF.
Channel Leakage Current with the Switch ON.
Maximum Input Voltage for Logic 0.
Minimum Input Voltage for Logic 1.
Input Current of the Digital Input.
OFF Switch Source Capacitance. Measured with reference to ground.
OFF Switch Drain Capacitance. Measured with reference to ground.
ON Switch Capacitance. Measured with reference to ground.
Digital Input Capacitance.
EN
S8
S6
GND
D
V
EN
S5
S7
S8
S6
SS
D
Figure 3. 16-Lead, 4 mm × 4 mm LFCSP Pin Configuration
1
2
3
4
1
2
3
4
5
6
7
8
Figure 2. 16-Lead TSSOP/QSOP Pin Configuration
(Not to Scale)
(Not to Scale)
16 15 14 13
5
TOP VIEW
ADG658
ADG658
TOP VIEW
6
7
8
EXPOSED PAD FLOATING
16
15
14
13
12
11
10
Rev. B | Page 11 of 20
9
12
11
10
9
V
S3
S2
S1
S4
A0
A1
A2
DD
S2
S1
S4
A0
S4B
S2B
DB
EN
GND
S1B
S3B
S4B
S2B
V
DB
EN
SS
ON
1
2
3
4
max − R
1
2
3
4
5
6
7
8
(Not to Scale)
(Not to Scale)
16 15 14 13
5
TOP VIEW
ADG659
ADG659
TOP VIEW
6
ON
7
min.
8
16
15
14
13
12
11
10
9
12
11
10
9
V
S3A
S2A
DA
S1A
S4A
A0
A1
DD
S2A
DA
S1A
S4A
X
logic inputs determine ON
ADG658/ADG659

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