ADF4153YCPZ Analog Devices Inc, ADF4153YCPZ Datasheet - Page 4
![Single RF F-N PLL](/photos/6/52/65293/505-20-lfcsp_sml.jpg)
ADF4153YCPZ
Manufacturer Part Number
ADF4153YCPZ
Description
Single RF F-N PLL
Manufacturer
Analog Devices Inc
Type
Fractional N Synthesizer (RF)r
Datasheet
1.ADF4153BRUZ.pdf
(24 pages)
Specifications of ADF4153YCPZ
Pll
Yes
Input
CMOS
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
Yes/No
Frequency - Max
4GHz
Divider/multiplier
No/Yes
Voltage - Supply
2.7 V ~ 3.3 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-LFCSP
Frequency-max
4GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF4153EBZ1 - BOARD EVAL FOR ADF4153
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADF4153
SPECIFICATIONS
AV
dBm referred to 50 Ω.
Table 1.
Parameter
RF CHARACTERISTICS (3 V)
REFERENCE CHARACTERISTICS
PHASE DETECTOR
CHARGE PUMP
LOGIC INPUTS
LOGIC OUTPUTS
POWER SUPPLIES
RF Input Frequency (RF
REF
REF
REF
REF
Phase Detector Frequency
I
I
Matching
I
I
V
V
I
C
V
V
AV
DV
V
I
Low Power Sleep Mode
CP
CP
CP
CP
INH
DD
DD
INH
INL
IN
OH
OL
P
High Value
Low Value
Absolute Accuracy
R
Three-State Leakage Current
DD
Sink/Source
vs. V
vs. Temperature
, Input Capacitance
/I
DD
, Output Low Voltage
, Output High Voltage
, Input Low Voltage
= DV
, Input High Voltage
IN
IN
IN
IN
SET
INL
, SDV
Input Frequency
Input Sensitivity
Input Capacitance
Input Current
, Input Current
Range
CP
DD
DD
= SDV
DD
= 2.7 V to 3.3 V; V
IN
)
4
B Version
0.5/4.0
0.5/4.0
1.0/4.0
10/250
0.7/AV
10
±100
32
5
312.5
2.5
1.5/10
1
2
2
2
1.4
0.6
±1
10
1.4
0.4
2.7/3.3
AV
AV
24
1
DD
DD
/5.5
P
DD
= AV
1
DD
Y Version
0.5/4.0
0.5/4.0
1.0/4.0
10/250
0.7/AV
10
±100
32
5
312.5
2.5
1.5/10
4.5
2
2
2
1.4
0.6
±1
10
1.4
0.4
2.7/3.3
AV
AV
24
1
to 5.5 V; AGND = DGND = 0 V; T
DD
DD
/5.5
DD
Rev. D | Page 4 of 24
2
Unit
GHz min/max
GHz min/max
GHz min/max
MHz min/max
V p-p min/max
pF max
μA max
MHz max
mA typ
μA typ
% typ
kΩ min/max
nA typ
% typ
% typ
% typ
V min
V max
μA max
pF max
V min
V max
V min/V max
V min/V max
mA max
μA typ
See Figure 12 for input circuit
For lower frequencies, ensure slew rate (SR) > 400 V/μs
See Figure 11 for input circuit
Programmable; see Table 5
0.5 V < V
20 mA typical
Test Conditions/Comments
B Version: −8 dBm minimum/0 dBm maximum
Y Version: −6.5 dBm minimum/0 dBm maximum
−10 dBm/0 dBm minimum/maximum
For f < 10 MHz, use a dc-coupled, CMOS-compatible
square wave; slew rate > 25 V/μs
Biased at AV
With R
With R
Sink and source current
0.5 V < V
V
Open-drain 1 kΩ pull-up to 1.8 V
I
OL
CP
= 500 μA
A
= V
= T
SET
SET
P
/2
CP
CP
MIN
= 5.1 kΩ
= 5.1 kΩ
< V
< V
to T
DD
P
P
/2
– 0.5
– 0.5
MAX
3
, unless otherwise noted;