ADA4941-1YCPZ-R7 Analog Devices Inc, ADA4941-1YCPZ-R7 Datasheet - Page 6
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ADA4941-1YCPZ-R7
Manufacturer Part Number
ADA4941-1YCPZ-R7
Description
Amplifier, Other
Manufacturer
Analog Devices Inc
Type
ADC Driverr
Datasheet
1.ADA4941-1YCPZ-R7.pdf
(24 pages)
Specifications of ADA4941-1YCPZ-R7
Design Resources
Converting a Single-Ended Signal with AD7982 Differential PulSAR ADC (CN0032) Converting a Single-Ended Signal with AD7984 Differential PulSAR ADC (CN0033)
Applications
Data Acquisition
Mounting Type
Surface Mount
Package / Case
8-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADA4941-1YCPZ-R7TR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADA4941-1YCPZ-R7
Manufacturer:
Intersil
Quantity:
254
ADA4941-1
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage
Power Dissipation
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
specified for a device soldered in the circuit board with its
exposed paddle soldered to a pad (if applicable) on the PCB
surface that is thermally connected to a copper plane, with zero
airflow.
Table 5. Thermal Resistance
Package Type
8-Lead SOIC on 4-Layer Board
8-Lead LFCSP with EP on 4-Layer Board
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4941-1
package is limited by the associated rise in junction temperature
(T
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4941-1. Exceeding a
junction temperature of 150°C for an extended period can
result in changes in the silicon devices potentially causing
failure.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
JA
J
) on the die. At approximately 150°C, which is the glass
is specified for the worst-case conditions, that is, θ
θ
126
83
JA
Rating
12 V
See Figure 3
−65°C to +125°C
−40°C to +85°C
300°C
150°C
θ
28
19
JC
JA
is
Unit
°C/W
°C/W
Rev. B | Page 6 of 24
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
drive depends upon the particular application. For each output,
the power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to all of the loads is equal to the sum of
the power dissipation due to each individual load. RMS voltages
and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θ
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θ
package must be soldered to a pad on the PCB surface that is
thermally connected to a copper plane to achieve the specified θ
Figure 3 shows the maximum safe power dissipation in the
packages vs. the ambient temperature for the 8-lead SOIC
(126°C/W) and for the 8-lead LFCSP (83°C/W) on a JEDEC
standard 4-layer board. The LFCSP must have its underside
paddle soldered to a pad that is thermally connected to a PCB
plane. θ
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
JA
2.5
2.0
1.5
1.0
0.5
0
–40
values are approximations.
JA
. The exposed paddle on the underside of the
–20
S
). The power dissipated due to the load
0
AMBIENT TEMPERATURE (°C)
SOIC
20
LFCSP
40
60
D
) is the sum of the
80
S
) times the
100
120
JA
. In
JA
.