AD9763-EBZ Analog Devices Inc, AD9763-EBZ Datasheet

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AD9763-EBZ

Manufacturer Part Number
AD9763-EBZ
Description
10 BIT, 125 MSPS Dual TxDAC+
Manufacturer
Analog Devices Inc
Series
TxDAC+®r
Datasheets

Specifications of AD9763-EBZ

Number Of Dac's
2
Number Of Bits
10
Outputs And Type
2, Differential
Sampling Rate (per Second)
125M
Data Interface
Parallel
Settling Time
35ns
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9763
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
a
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • 781/329-4700 • World Wide Web Site: http://www.analog.com
GENERAL DESCRIPTION
The AD9709, AD9763, AD9765 and AD9767 are high-
speed, high-performance dual DACs (8-, 10-, 12-, 14-
bits) designed for I/Q transmit applications and for appli-
cations where board space is at a premium. The
evaluation board allows the user to take full advantage
of the various modes in which the AD976x can operate.
This includes operation as dual DACs with their own indi-
vidual digital inputs, as well as interleaved DACs where
data is alternately written from digital input Port 1 to
either of the two DACs. Information on how to operate
the evaluation board is included in this application
note. However, for more detailed performance informa-
tion, the reader should consult the individual data
sheets for the AD9709, AD9763, AD9765, and AD9767.
The 8-, 10-, 12-, and 14-bit DACs in this family are all pin-
for-pin-compatible and are MSB justified. Therefore, the
same evaluation board can be used to evaluate all
four parts.
EVALUATION SETUP
To evaluate the performance of the AD976x dual DAC
family, a small set of measurement and signal genera-
tion equipment is needed. Figure 1 shows a typical test
setup. Power supplies capable of driving from 3 V to 5 V
are needed for both analog and digital circuitry on the
evaluation board. A signal generator and digital word
generator are needed to provide the data and clock
inputs. On the output, an oscilloscope or spectrum
analyzer may be needed, depending on the type of per-
formance being analyzed.
REV. 0
Using the AD9709, AD9763, AD9765, AD9767 Dual DAC Evaluation Board
DVDDIN
BAN-JACK
BAN-JACK
0.001 F
Figure 2. Analog and Digital Power Connections on Dual DAC Evaluation Board
TP10
C1
DVDD
BEAD
L1
0.01 F
C2
DVDD
C9
10 F
25V
0.1 F
C3
TP37 TP38
By Steve Reine and Dawn Ostenberg
TP43
DCOM1
DCOM2
DVDD1
DGND
TP39
DUAL DAC
AD9709
AD9763
AD9765
AD9767
DVDD2
AVDD
Figure 1. Typical Test Setup to Evaluate Performance
of AD976x Dual DAC Using Evaluation Board
POWER CONNECTIONS
The AD9709, AD9763, AD9765, AD9767 dual DACs all
have separate digital and analog power and ground
pins. Analog and digital power and ground have their own
banana-style connectors on the dual DAC evaluation
board. The best performance when using the evaluation
board is achieved when analog and digital power and
ground are connected to separate power supplies.
Figure 2 shows the power supply, grounding, and decou-
pling connections for the evaluation board and for the
DAC itself. Note that for best noise rejection on the
power supplies, the high value bulk capacitors are
placed at the external power connectors, while the
smaller value capacitors, needed for high frequency
rejection, are located close to the DAC.
ACOM
AVDDIN
SOURCE
CLOCK
BAN-JACK
BAN-JACK
TP11
(3V TO 5V)
C13
0.1 F
ANALOG
VDD
APPLICATION NOTE
BEAD
L2
CLK
AVDD
C12
0.01 F
AVDD
ACOM
GENERATOR
EVALUATION
AVDD
DATA BUS
DUAL DAC
C10
10 F
25V
DIGITAL
DATA IN
BOARD
WORD
C11
0.001 F
DCOM
TP40
DVDD
TP44
TP41
(3V TO 5V)
DIGITAL
DATA
VDD
OUT
AGND
TP42
AN-555
OSCILLOSCOPE
SPECTRUM
ANALYZER

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AD9763-EBZ Summary of contents

Page 1

... One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • 781/329-4700 • World Wide Web Site: http://www.analog.com Using the AD9709, AD9763, AD9765, AD9767 Dual DAC Evaluation Board GENERAL DESCRIPTION The AD9709, AD9763, AD9765 and AD9767 are high- speed, high-performance dual DACs (8-, 10-, 12-, 14- bits) designed for I/Q transmit applications and for appli- cations where board space premium ...

Page 2

... DACs (inter- leaving mode). DATA INPUT ON AD9763/AD9765/AD9767 JP9 DCLKIN1 DCLKIN2 JP16 DVDD JP5 I C JP4 I C JP3 –2– JP6 DVDD H L JP2 D PRE JP1 Q CLK CLR 1 74HC112 JP7 DGND;8 DVDD;16 DVDD H L WRT1/IQWRT CLK1/IQCLK CLK2/IQRESET WRT2/IQSEL AD9709/AD9763/AD9765/AD9767 ter- REV. 0 ...

Page 3

... REV. 0 detailed information on the functions of these inputs, as well as the DAC input and output timing, see the AD9709, AD9763, AD9765, and AD9767 data sheets. Operation with a single clock can be achieved by select- ing JP16 or JP9 for the clock source and inserting JP5 in the C position, and removing JP3. JP4 can be used to control IQRESET, but for most evaluations can simply be tied low (Position I) ...

Page 4

... This is the mea- sured data hold time. REFERENCE OPERATION The AD9709, AD9763, AD9765, AD9767 contain a single 1.2 V reference that is shared by both of the DACs on the chip. This reference drives two control amplifiers that independently control the full-scale output currents in each of the two DACs ...

Page 5

... REFERENCE FSADJ I 2k REF Figure 8. External Reference Configuration MASTER/SLAVE RESISTOR MODE, GAINCTRL The AD9709, AD9763, AD9765, AD9767 all allow the gain of each channel to be independently set by connecting one R resistor to FSADJ1 and another R SET FSADJ2. To add flexibility and reduce system cost, a single R ...

Page 6

... AN-555 TROUBLESHOOTING The dual DAC evaluation board has been designed to allow optimum performance from the AD9709, AD9763, AD9765, AD9767. However, many factors can contribute to suboptimal performance. The following is a list of potential problems and their likely sources. Problem—No signal or reduced signal on the output. ...

Page 7

RED TP10 B1 L1 DVDDIN BEAD BAN-JACK B2 BAN-JACK WHT TP29 WRT1IN S1 IQWRT DGND;3,4,5 WHT TP30 CLK1IN S2 IQCLK DGND;3,4,5 WHT TP31 CLK2IN S3 RESET DGND;3,4,5 WHT TP32 WRT2IN S4 IQSEL DGND;3,4,5 WHT TP33 SLEEP 1 R13 50 2 ...

Page 8

AN-555 RP3 RCOM 22 DVDD INP1 RP5 RP5, 10 INP2 RP5, 10 INP3 RP5, 10 INP4 RP5, ...

Page 9

... IB1 4 DUTP5 5 DB9P1 FSADJ1 DUTP6 6 DB8P1 REFIO DB7P1 GAINCTRL DUTP7 7 DUTP8 DB6P1 FSADJ2 8 DUTP9 DB5P1 IA2 9 DUTP10 10 DB4P1 IB2 U2 AD9763/ DUTP11 11 DB3P1 ACOM AD9765/ DUTP12 DB2P1 SLEEP 12 AD9767 DUTP13 DB1P1 DB0P2 13 DUTP14 DB0P1 DB1P2 14 15 DCOM1 DB2P2 16 DVDD1 DB3P2 WRT1 WRT1 ...

Page 10

AN-555 Figure 13. Assembly, Top Side Figure 14. Assembly, Bottom Side –10– REV. 0 ...

Page 11

REV. 0 Figure 15. Layer 1, Top Side Figure 16. Layer 2, Ground Plane –11– AN-555 ...

Page 12

AN-555 Figure 17. Layer 3, Power Plane Figure 18. Layer 4, Bottom Side –12– REV. 0 ...

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