AD9739BBCRL Analog Devices Inc, AD9739BBCRL Datasheet - Page 36
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AD9739BBCRL
Manufacturer Part Number
AD9739BBCRL
Description
14 Bit 2.5 GSPS DAC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9739BBCZ.pdf
(56 pages)
Specifications of AD9739BBCRL
Number Of Bits
14
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
980mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
160-CSPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Settling Time
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AD9739
Bit Name
Retry
Search_Tol
Mu_LOST
Mu_LKD
Table 30. Analog Controller Registers (Register 0x32, Register 0x33)
Register
Name
ANA_CNT1
ANA_CNT2
1
Table 31. Analog Controller Register Bit Descriptions
Bit Name
MSEL[1:0]
HDRM[7:0]
The two-digit number is the decimal representation of the address.
Read/Write
Write
Write
Address
0x32
0x33
Read/Write
Read/write
Read/write
Read
Read
51
50
1
Bit 7
N/A
HDRM[7]
Description
0x0: mirror roll-off frequency control = bypass.
0x1: mirror roll-off frequency control = narrowest bandwidth.
0x2: mirror roll-off frequency control = medium bandwidth.
0x3: mirror roll-off frequency control = widest bandwidth.
See the plot in the Analog Control Registers section.
0xCA: output stack headroom control.
HDRM[7:4]: set the reference offset from AVDD33 (VCAS centering).
HDRM[3:0]: set the overdrive (current density) trim (temperature tracking).
Description
0x0: if the correct value is not found, the search stops.
0x1: if the correct value is not found, the search begins again.
0x0: not exact (can find a phase within two values of the desired phase).
0x1: finds the exact phase that is targeted (optimal setting).
0x0: mu controller has not lost lock.
0x1: mu controller has lost lock.
0x0: mu controller is not locked.
0x1: mu controller is locked.
Bit 6
HDRM[6]
N/A
Bit 5
HDRM[5]
N/A
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Bit 4
N/A
HDRM[4]
Bit 3
HDRM[3]
N/A
Bit 2
HDRM[2]
N/A
Reset Value for Write Register
0x03
0xCA
Bit 1
HDRM[1]
MSEL[1]
Reset Value for
Write Register
0x0
0x0
0x0
0x0
Bit 0
HDRM[0]
MSEL[0]