AD9726-EBZ Analog Devices Inc, AD9726-EBZ Datasheet - Page 6

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AD9726-EBZ

Manufacturer Part Number
AD9726-EBZ
Description
16Bit DAC 650+ MSPS LVDS Interface
Manufacturer
Analog Devices Inc
Series
TxDAC+®r
Datasheet

Specifications of AD9726-EBZ

Number Of Dac's
1
Number Of Bits
16
Outputs And Type
1, Differential
Sampling Rate (per Second)
400M
Data Interface
Parallel
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9726
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9726
Parameter
SERIAL PORT INTERFACE
RESET PULSE WIDTH
TIMING DIAGRAMS
SCLK Frequency (f
SCLK Rise/Fall Time
SCLK Pulse Width High (t
SCLK Pulse Width Low (t
SCLK Setup Time (t
SDIO Setup Time (t
SDIO Hold Time (t
SDIO/SDO Valid Time (t
DH
SCLK
CSU
DSU
)
)
)
)
DV
CPWL
CPWH
)
)
)
DATACLOCK OUTPUT
DATACLOCK OUTPUT
DATACLOCK INPUT
DATACLOCK INPUT
IOUTA OR IOUTB
DAC CLOCK
DB0 TO DB15
DAC CLOCK
DATA BUS
DATA BUS
CLK+/CLK–
Figure 4. Data Synchronization Bypass Timing Diagram
Figure 2. DDR Timing Diagram
Figure 3. SDR Timing Diagram
Rev. B | Page 6 of 24
t
DSU-BYPASS
t
t
DCPD-DDR
DCPD-SDR
t
DSU-DDR
t
DSU-SDR
t
PD-BYPASS
Min
t
1.5
30
30
30
30
DH-BYPASS
0
t
t
DH-DDR
DH-SDR
Typ
Max
15
30
1
Unit
MHz
ms
ns
ns
ns
ns
ns
ns
ns

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