AD9627-125EBZ Analog Devices Inc, AD9627-125EBZ Datasheet - Page 40

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AD9627-125EBZ

Manufacturer Part Number
AD9627-125EBZ
Description
12Bit 125 Msps Dual 1.8V PB Free ADC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9627-125EBZ

Number Of Adc's
2
Number Of Bits
12
Sampling Rate (per Second)
125M
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
900mW @ 125MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9627
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9627
CHANNEL/CHIP SYNCHRONIZATION
The AD9627 has a SYNC input that offers the user flexible
synchronization options for synchronizing the internal blocks.
The clock divider sync feature is useful for guaranteeing synchro-
nized sample clocks across multiple ADCs. The signal monitor
block can also be synchronized using the SYNC input, allowing
properties of the input signal to be measured during a specific
time period. The input clock divider can be enabled to synchronize
on a single occurrence of the SYNC signal or on every occurrence.
The signal monitor block is synchronized on every SYNC input
signal.
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The SYNC input is internally synchronized to the sample clock;
however, to ensure there is no timing uncertainty between multiple
parts, the SYNC input signal should be externally synchronized to
the input clock signal, meeting the setup and hold times shown
in Table 8. The SYNC input should be driven using a single-
ended CMOS-type signal.

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