AD9522-5/PCBZ Analog Devices Inc, AD9522-5/PCBZ Datasheet - Page 51
AD9522-5/PCBZ
Manufacturer Part Number
AD9522-5/PCBZ
Description
12/24 Channel Clock Gen 2,0GH
Manufacturer
Analog Devices Inc
Datasheet
1.AD9522-5BCPZ-REEL7.pdf
(76 pages)
Specifications of AD9522-5/PCBZ
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9522-5
Primary Attributes
12 LVDS/24 CMOS Outputs
Secondary Attributes
I²C & SPI Interfaces
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 40. Serial Control Port Timing
Parameter
t
t
t
t
t
t
t
t
DS
DH
CLK
S
C
HIGH
LOW
DV
SCLK
SDIO
CS
Description
Setup time between data and rising edge of SCLK
Hold time between data and rising edge of SCLK
Period of the clock
Setup time between the CS falling edge and SCLK rising edge (start of communication cycle)
Setup time between SCLK rising edge and the CS rising edge (end of communication cycle)
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
SCLK to valid SDIO and SDO (see Figure 54)
t
t
DS
S
BIT N
t
HIGH
t
DH
Figure 56. Serial Control Port Timing—Write
t
CLK
Rev. 0 | Page 51 of 76
t
LOW
BIT N + 1
t
C
AD9522-5
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