AD9520-5/PCBZ Analog Devices Inc, AD9520-5/PCBZ Datasheet - Page 3

• Manufacturer Part Number: AD9520-5/PCBZ
• Description: 12/24 Channel Clock Gen 2,0GH
• Manufacturer: Analog Devices Inc

Specifications of AD9520-5/PCBZ

• Design Resources: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
• Main Purpose: Timing, Clock Generator
• Utilized Ic / Part: AD9520-5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Compliant

Serial Control Port .......................................................................... 46
EEPROM Operations ...................................................................... 53
REVISION HISTORY
10/08—Revision 0: Initial Version
SPI/I2C Port Selection ................................................................ 46
I2C Serial Port Operation ........................................................... 46
SPI Serial Port Operation ........................................................... 49
SPI Instruction Word (16 Bits) .................................................. 50
SPI MSB/LSB First Transfers ..................................................... 50
Writing to the EEPROM ............................................................ 53
Reading from the EEPROM ...................................................... 53
I
Data Transfer Process ............................................................. 47
Data Transfer Format ............................................................. 48
I2C Serial Port Timing ............................................................ 48
Pin Descriptions ...................................................................... 49
SPI Mode Operation ............................................................... 49
Communication Cycle—Instruction Plus Data .................. 49
Write ......................................................................................... 49
Read .......................................................................................... 49
2
C Bus Characteristics ........................................................... 46
Rev. 0 | Page 3 of 80
Thermal Performance ..................................................................... 55
Register Map .................................................................................... 56
Register Map Descriptions ............................................................. 61
Applications Information ............................................................... 75
Outline Dimensions ........................................................................ 77
Programming the EEPROM Buffer Segment.......................... 53
Frequency Planning Using the AD9520 .................................. 75
Using the AD9520 Outputs for ADC Clock Applications .... 75
LVPECL Clock Distribution ...................................................... 75
CMOS Clock Distribution ......................................................... 76
Ordering Guide ........................................................................... 77
Register Section Definition Group ....................................... 54
IO_UPDATE (Operational Code 0x80) .............................. 54
End-of-Data (Operational Code 0xFF) ............................... 54
Pseudo-End-of-Data (Operational Code 0xFE) ................. 54
AD9520-5