AD9516-5BCPZ Analog Devices Inc, AD9516-5BCPZ Datasheet - Page 54

• Manufacturer Part Number: AD9516-5BCPZ
• Description: 10/14 Chan Clock IC W/PLL-no VCO
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9516-5BCPZ

• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:14
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.4GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9516-5
REGISTER MAP DESCRIPTIONS
Table 48 through Table 57 provide a detailed description of each of the control register functions. The registers are listed by hexadecimal
address. Reference to a specific bit or range of bits within a register is indicated by the brackets. For example, [3] refers to Bit 3, and [5:2]
refers to the range of bits from Bit 5 through Bit 2.
Table 48. Serial Port Configuration
Reg. Addr (Hex)
000
000
000
000
000
004
Bit(s)
[7]
[6]
[5]
[4]
[3:0]
[0]
Name
SDO active
LSB first
Soft reset
Long instruction
Mirror [7:4]
Read back active registers
Description
Selects unidirectional or bidirectional data transfer mode.
[7] = 0; SDIO pin used for write and read; SDO set high impedance;
bidirectional mode (default).
[7] = 1; SDO used for read; SDIO used for write; unidirectional mode.
MSB or LSB data orientation.
[6] = 0; data-oriented MSB first; addressing decrements (default).
[6] = 1; data-oriented LSB first; addressing increments.
Soft reset.
[5] = 1 (not self-clearing). Soft reset; restores default values to internal registers.
Not self-clearing. Must be cleared to 0b to complete reset operation.
Short/long instruction mode (this part uses long instruction mode only, so this bit
should always be = 1).
[4] = 0; 8-bit instruction (short).
[4] = 1; 16-bit instruction (long) (default).
Bits[3:0] should always mirror [7:4] so that it does not matter whether the part
is in MSB or LSB first mode (see Register 0x000[6]). User should set bits as follows:
[0] = [7].
[1] = [6].
[2] = [5].
[3] = [4].
Select register bank used for a readback.
[0] = 0; read back buffer registers (default).
[0] = 1; read back active registers.
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