AD9380KSTZ-150 Analog Devices Inc, AD9380KSTZ-150 Datasheet - Page 28

no-image

AD9380KSTZ-150

Manufacturer Part Number
AD9380KSTZ-150
Description
IC,TV/VIDEO CIRCUIT,Video Interface Circuit,CMOS,QFP,100PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9380KSTZ-150
Manufacturer:
AD
Quantity:
3 100
Part Number:
AD9380KSTZ-150
Manufacturer:
ADI
Quantity:
105
Part Number:
AD9380KSTZ-150
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9380
Hex
Address
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
Read/Write
or Read-Only
Read
Read
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Bits
[6]
[5]
[4]
[3]
[2:0]
[6]
[5]
[4]
[3:0]
[7:4]
[3:0]
[7]
[6]
[5:0]
[7]
[6]
[5:0]
[7:6]
[5]
[4]
[3]
[2]
[1]
[6:5]
[4:0]
[7:0]
[4:0]
[7:0]
Default
Value
*0******
**0*****
***0****
****0***
*****000
*0******
**0*****
***0****
****0000
1001****
****0110
0*******
*0******
**001101
1*******
*0******
**010101
10******
**0*****
***0****
****0***
*****0**
******0*
*01* ****
***01100
01010010
***01000
00000000
Register Name
TMDS Sync Detect
TMDS Active
AV Mute
HDCP Keys Read
HDMI Quality
HDMI Content
Encrypted
DVI HSYNC Polarity
DVI VSYNC Polarity
HDMI Pixel
Repetition
MV Pulse Max
MV Pulse Min
MV Oversample En
MV Pal En
MV Line Count Start
MV Detect Mode
MV Settings Override
MV Line Count End
MV Pulse Limit Set
Low Freq Mode
Low Freq Override
Up Conversion Mode
CrCb Filter Enable
CSC_Enable
CSC_Mode
CSC_Coeff_A1 MSB
CSC_Coeff_A1 LSB
CSC_Coeff_A2 MSB
CSC_Coeff_A2 LSB
Rev. 0 | Page 28 of 60
Detects a TMDS DE.
Detects a TMDS clock.
Tells the Macrovision detection engine to enter PAL mode.
Sets the start line for Macrovision detection.
Description
Gives the status of AV mute based on general control packets.
Returns 1 when read of EEPROM keys is successful.
Returns quality number based on DE edges.
This bit is high when HDCP decryption is in use (content is
protected). The signal goes low when HDCP is not being used.
Customers can use this bit to determine whether or not to allow
copying of the content. The bit should be sampled at regular
intervals because it can change on a frame by frame basis.
Returns DVI HSYNC polarity.
Returns DVI VSYNC polarity.
Returns current HDMI pixel repetition amount. 0 = 1×, 1 = 2×, ...
The clock and data outputs automatically decimate by this value
to present the data in the original form.
Sets the maximum pseudo sync pulse width for Macrovision
detection.
Sets the minimum pseudo sync pulse width for Macrovision
detection.
Tells the Macrovision detection engine whether we are
oversampling or not.
0 = standard definition.
1 = progressive scan mode.
0 = use hard-coded settings for line counts and pulse widths.
1 = use I
Sets the end line for Macrovision detection.
Sets the number of pulses required in the last 3 lines (SD mode
only).
Sets audio PLL to low frequency mode. Low frequency mode
should only be set for pixel clocks <80 MHz.
Allows the previous bit to be used to set low frequency mode
rather than the internal auto-detect.
0 = repeat Cr and Cb values.
1 = interpolate Cr and Cb values.
Enables the FIR filter for 4:2:2 CrCb output.
Enables the CSC. The default settings for the CSC provide HDTV-
to-RGB conversion.
Sets the fixed point position of the CSC coefficients, including
the A4, B4, and C4 offsets.
00 = ±1.0, −4096 to +4095.
01 = ±2.0, −8192 to +8190.
1× = ±4.0, −16384 to +16380.
MSB, Register 0x36.
Color space converter (CSC) coefficient for equation:
R
G
B
MSB, Register 0x38.
CSC coefficient for equation:
R
G
B
OUT
OUT
B
OUT
OUT
B
OUT
OUT
= (A1 × R
= (C1 × R
= (A1 × R
= (C1 × R
= (B1 × R
= (B1 × R
2
C values for these settings.
IN
IN
IN
IN
IN
IN
) + (C2 × G
) + (C2 × G
) + (B2 × G
) + (B2 × G
) + (A2 × G
+ (A2 × G
IN
IN
IN
IN
IN
IN
) + (A3 × B
) + (C3 × B
) + (C3 × B
) + (B3 × B
) + (B3 × B
) + (A3 × B
IN
IN
IN
IN
IN
IN
) + A4
) + B4
) + C4
) + B4
) + C4
) + A4

Related parts for AD9380KSTZ-150