AD9268BCPZ-125 Analog Devices Inc, AD9268BCPZ-125 Datasheet - Page 3

• Manufacturer Part Number: AD9268BCPZ-125
• Description: Dual 16 Bit 125 High SNR ADC
• Manufacturer: Analog Devices Inc

Specifications of AD9268BCPZ-125

• Design Resources: Powering AD9268 with ADP2114 for Increased Efficiency (CN0137)
• Number Of Bits: 16
• Sampling Rate (per Second): 125M
• Data Interface: Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 777mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Number Of Elements: 2
• Resolution: 16Bit
• Architecture: Pipelined
• Sample Rate: 125MSPS
• Input Polarity: Bipolar
• Input Type: Voltage
• Rated Input Volt: ±1V
• Differential Input: Yes
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 1.8V
• Single Supply Voltage (min): 1.7V
• Single Supply Voltage (max): 1.9V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Differential Linearity Error: ±0.5LSB(Typ)
• Integral Nonlinearity Error: ±1.5LSB(Typ)
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LFCSP EP
• Input Signal Type: Differential
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

GENERAL DESCRIPTION
The AD9268 is a dual, 16-bit, 80 MSPS/105 MSPS/125 MSPS
analog-to-digital converter (ADC). The AD9268 is designed to
support communications applications where high performance,
combined with low cost, small size, and versatility, is desired.
The dual ADC core features a multistage, differential pipelined
architecture with integrated output error correction logic. Each
ADC features wide bandwidth, differential sample-and-hold
analog input amplifiers that support a variety of user-selectable
input ranges. An integrated voltage reference eases design consid-
erations. A duty cycle stabilizer is provided to compensate for
variations in the ADC clock duty cycle, allowing the converters
to maintain excellent performance.
Rev. A | Page 3 of 44
The ADC output data can be routed directly to the two external
16-bit output ports. These outputs can be set to either 1.8 V
CMOS or LVDS.
Flexible power-down options allow significant power savings,
when desired.
Programming for setup and control is accomplished using a 3-wire
SPI-compatible serial interface.
The AD9268 is available in a 64-lead LFCSP and is specified over
the industrial temperature range of −40°C to +85°C.
AD9268