AD9268-125EBZ Analog Devices Inc, AD9268-125EBZ Datasheet - Page 7
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AD9268-125EBZ
Manufacturer Part Number
AD9268-125EBZ
Description
Dual 16 Bit 125 High SNR ADC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9268BCPZ-80.pdf
(44 pages)
Specifications of AD9268-125EBZ
Design Resources
Powering AD9268 with ADP2114 for Increased Efficiency (CN0137)
Number Of Adc's
2
Number Of Bits
16
Sampling Rate (per Second)
125M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
750mW @ 125MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9268
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Parameter
WORST OTHER (HARMONIC OR SPUR)
TWO-TONE SFDR, WITHOUT DITHER
CROSSTALK
ANALOG INPUT BANDWIDTH
1
2
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, and DCS enabled, unless
otherwise noted.
Table 3.
Parameter
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−)
SYNC INPUT
See the
Crosstalk is measured at 100 MHz with −1 dBFS on one channel and no input on the alternate channel.
Without Dither
With On-Chip Dither
f
f
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
Logic Compliance
Internal Bias
Input Voltage Range
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
IN
IN
f
f
f
f
f
f
f
f
= 169 MHz (−7 dBFS ), 172 MHz (−7 dBFS)
= 29 MHz (−7 dBFS ), 32 MHz (−7 dBFS)
IN
IN
IN
IN
IN
IN
IN
IN
= 2.4 MHz
= 70 MHz
= 140 MHz
= 200 MHz
= 2.4 MHz
= 70 MHz
= 140 MHz
= 200 MHz
AN-835
1
2
Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions.
Temp
25°C
25°C
Full
25°C
25°C
25°C
25°C
Full
25°C
25°C
25°C
25°C
Full
25°C
Min
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
AD9268BCPZ-80
Rev. A | Page 7 of 44
Typ
−99
−100
−98
−96
−108
−106
−105
−102
93
81
−95
650
Max
−96
−96
−96
−96
Min
0.3
AGND
0.9
−100
−100
8
AGND
1.2
AGND
−100
−100
12
Min
AD9268BCPZ-105
Typ
−100
−99
−98
−94
−107
−107
−104
−102
92
80
−95
650
Typ
CMOS/LVDS/LVPECL
4
CMOS
1
0.9
10
0.9
16
Max
−94
−94
−95
−95
Min
AD9268BCPZ-125
Typ
−100
−100
−98
−96
−108
−106
−103
−99
90
82
−95
650
Max
3.6
AVDD
1.4
+100
+100
12
AVDD
AVDD
0.6
+100
+100
20
Max
−94
−94
−95
−95
AD9268
Unit
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dB
MHz
Unit
V
V p-p
V
V
μA
μA
pF
kΩ
V
V
V
V
μA
μA
pF
kΩ