AD9235BCP-20EBZ Analog Devices Inc, AD9235BCP-20EBZ Datasheet

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AD9235BCP-20EBZ

Manufacturer Part Number
AD9235BCP-20EBZ
Description
12-BIT 3V 20/40/65 MSPS ADC
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD9235BCP-20EBZ

Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
20M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
95mW @ 20MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9235-20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
a
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
PRODUCT DESCRIPTION
The AD9235 is a family of monolithic, single 3 V supply, 12-bit,
20/40/65 MSPS analog-to-digital converters. This family
features a high performance sample-and-hold amplifier (SHA)
and voltage reference. The AD9235 uses a multistage differential
pipelined architecture with output error correction logic to provide
12-bit accuracy at 20/40/65 MSPS data rates and guarantee
no missing codes over the full operating temperature range.
The wide bandwidth, truly differential SHA allows a variety of
user-selectable input ranges and offsets including single-ended
applications. It is suitable for multiplexed systems that switch
full-scale voltage levels in successive channels and for sampling
single-channel inputs at frequencies well beyond the Nyquist rate.
Combined with power and cost savings over previously available
analog-to-digital converters, the AD9235 is suitable for applica-
tions in communications, imaging, and medical ultrasound.
A single-ended clock input is used to control all internal conversion
cycles. A duty cycle stabilizer (DCS) compensates for wide
variations in the clock duty cycle while maintaining excellent
overall ADC performance. The digital output data is presented
in straight binary or twos complement formats. An out-of-range
(OTR) signal indicates an overflow condition that can be used
with the most significant bit to determine low or high overflow.
Fabricated on an advanced CMOS process, the AD9235 is available
in a 28-lead thin shrink small outline package (TSSOP) and a
32-lead chip scale package (LFCSP) and is specified over the
industrial temperature range (–40°C to +85°C).
FEATURES
Single 3 V Supply Operation (2.7 V to 3.6 V)
SNR = 70 dBc to Nyquist at 65 MSPS
SFDR = 85 dBc to Nyquist at 65 MSPS
Low Power: 300 mW at 65 MSPS
Differential Input with 500 MHz Bandwidth
On-Chip Reference and SHA
DNL =
Flexible Analog Input: 1 V p-p to 2 V p-p Range
Offset Binary or Twos Complement Data Format
Clock Duty Cycle Stabilizer
APPLICATIONS
Ultrasound Equipment
IF Sampling in Communications Receivers:
Battery-Powered Instruments
Hand-Held Scopemeters
Low Cost Digital Oscilloscopes
IS-95, CDMA-One, IMT-2000
0.4 LSB
PRODUCT HIGHLIGHTS
1. The AD9235 operates from a single 3 V power supply and
2. Operating at 65 MSPS, the AD9235 consumes a low 300 mW.
3. The patented SHA input maintains excellent performance
4. The AD9235 pinout is similar to the AD9214-65, a 10-bit,
5. The clock DCS maintains overall ADC performance over a
6. The OTR output bit indicates when the signal is beyond the
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
SENSE
REFB
REFT
VREF
features a separate digital output driver supply to accommodate
2.5 V and 3.3 V logic families.
for input frequencies up to 100 MHz and can be configured
for single-ended or differential operation.
65 MSPS ADC. This allows a simplified upgrade path from
10 bits to 12 bits for 65 MSPS systems.
wide range of clock pulsewidths.
selected input range.
VIN+
VIN–
SHA
SELECT
REF
FUNCTIONAL BLOCK DIAGRAM
AVDD
12-Bit, 20/40/65 MSPS
AGND
A/D
© 2003 Analog Devices, Inc. All rights reserved.
MDAC1
0.5V
AD9235
4
DUTY CYCLE
STABLIZER
3 V A/D Converter
CLOCK
CLK
CORRECTION LOGIC
OUTPUT BUFFERS
1 1/2-BIT PIPELINE
8-STAGE
PDWN
16
12
DRVDD
AD9235
SELECT
MODE
MODE
www.analog.com
A/D
DGND
3
OTR
D11
D0

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AD9235BCP-20EBZ Summary of contents

Page 1

FEATURES Single 3 V Supply Operation (2 3.6 V) SNR = 70 dBc to Nyquist at 65 MSPS SFDR = 85 dBc to Nyquist at 65 MSPS Low Power: 300 MSPS Differential Input with ...

Page 2

AD9235–SPECIFICATIONS (AVDD = 3 V, DRVDD = 2.5 V, Maximum Sample Rate p-p Differential Input, DC SPECIFICATIONS 1.0 V internal reference, T Parameter Temp Level RESOLUTION Full ACCURACY No Missing Codes Guaranteed Full Offset Error Full 1 Gain ...

Page 3

DIGITAL SPECIFICATIONS Parameter Temp Level LOGIC INPUTS High Level Input Voltage Full Low Level Input Voltage Full High Level Input Current Full Low Level Input Current Full Input Capacitance Full LOGIC OUTPUTS* DRVDD = 3.3 V High-Level Output Voltage Full ...

Page 4

AD9235–SPECIFICATIONS (AVDD = 3 V, DRVDD = 2.5 V, Maximum Sample Rate p-p Differential Input, AIN = –0.5 dBFS, AC SPECIFICATIONS 1.0 V internal reference, T Parameter Temp Level SIGNAL-TO-NOISE RATIO f = 2.4 MHz 25°C INPUT f ...

Page 5

... AD9235-20PCB AD9235-40PCB AD9235-65PCB AD9235BCP-20EB AD9235BCP-40EB AD9235BCP-65EB *It is recommended that the exposed paddle be soldered to the ground plane. There is an increased reliability of the solder joints and maximum thermal capability of the package is achieved with exposed paddle soldered to the customer board. CAUTION ESD (electrostatic discharge) sensitive device ...

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