AD9219BCPZRL7-65 Analog Devices Inc, AD9219BCPZRL7-65 Datasheet - Page 26

• Manufacturer Part Number: AD9219BCPZRL7-65
• Description: IC,A/D CONVERTER,QUAD,10-BIT,CMOS,LLCC,48PIN
• Manufacturer: Analog Devices Inc

Specifications of AD9219BCPZRL7-65

• Number Of Bits: 10
• Sampling Rate (per Second): 65M
• Data Interface: Serial, SPI™
• Number Of Converters: 4
• Power Dissipation (max): 408mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9219-65EBZ - BOARD EVALUATION FOR AD9219AD9219-65EB - BOARD EVALUATION FOR AD9219
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9219
Two output clocks are provided to assist in capturing data from
the AD9219. The DCO is used to clock the output data and is
equal to five times the sample clock (CLK) rate. Data is clocked
out of the AD9219 and must be captured on the rising and
falling edges of the DCO that supports double data rate (DDR)
Table 9. Flexible Output Test Modes
Output Test Mode
Bit Sequence
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1
All test mode options except PN sequence short and PN sequence long can support 8- to 14-bit word lengths in order to verify data capture to the receiver.
Pattern Name
Off (default)
Midscale short
+Full-scale short
−Full-scale short
Checkerboard
PN sequence long
PN sequence short
One-/zero-word toggle
User input
1-/0-bit toggle
1× sync
One bit high
Mixed frequency
1
1
Digital Output Word 1
N/A
1000 0000 (8-bit)
10 0000 0000 (10-bit)
1000 0000 0000 (12-bit)
10 0000 0000 0000 (14-bit)
1111 1111 (8-bit)
11 1111 1111 (10-bit)
1111 1111 1111 (12-bit)
11 1111 1111 1111 (14-bit)
0000 0000 (8-bit)
00 0000 0000 (10-bit)
0000 0000 0000 (12-bit)
00 0000 0000 0000 (14-bit)
1010 1010 (8-bit)
10 1010 1010 (10-bit)
1010 1010 1010 (12-bit)
10 1010 1010 1010 (14-bit)
N/A
N/A
1111 1111 (8-bit)
11 1111 1111 (10-bit)
1111 1111 1111 (12-bit)
11 1111 1111 1111 (14-bit)
Register 0x19 to Register 0x1A
1010 1010 (8-bit)
10 1010 1010 (10-bit)
1010 1010 1010 (12-bit)
10 1010 1010 1010 (14-bit)
0000 1111 (8-bit)
00 0001 1111 (10-bit)
0000 0011 1111 (12-bit)
00 0000 0111 1111 (14-bit)
1000 0000 (8-bit)
10 0000 0000 (10-bit)
1000 0000 0000 (12-bit)
10 0000 0000 0000 (14-bit)
1010 0011 (8-bit)
10 0110 0011 (10-bit)
1010 0011 0011 (12-bit)
10 1000 0110 0111 (14-bit)
Rev. D | Page 26 of 52
capturing. The FCO is used to signal the start of a new output
byte and is equal to the sample clock rate. See the timing
diagram shown in Figure 2 for more information.
Digital Output Word 2
N/A
Same
Same
Same
0101 0101 (8-bit)
01 0101 0101 (10-bit)
0101 0101 0101 (12-bit)
01 0101 0101 0101 (14-bit)
N/A
N/A
0000 0000 (8-bit)
00 0000 0000 (10-bit)
0000 0000 0000 (12-bit)
00 0000 0000 0000 (14-bit)
Register 0x1B to Register 0x1C
N/A
N/A
N/A
N/A
Yes
Yes
Yes
Subject to Data
Format Select
N/A
No
Yes
Yes
No
No
No
No
No
No