AD9212BCPZ-65 Analog Devices Inc, AD9212BCPZ-65 Datasheet - Page 2

• Manufacturer Part Number: AD9212BCPZ-65
• Description: IC,A/D CONVERTER,OCTAL,10-BIT,LLCC,64PIN
• Manufacturer: Analog Devices Inc

Specifications of AD9212BCPZ-65

• Number Of Bits: 10
• Sampling Rate (per Second): 65M
• Data Interface: Serial, SPI™
• Number Of Converters: 8
• Power Dissipation (max): 833mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9212-65EBZ - BOARD EVALUATION FOR AD9212
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9212
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 9
Pin Configuration and Function Descriptions ........................... 10
Equivalent Circuits ......................................................................... 12
Typical Performance Characteristics ........................................... 14
Theory of Operation ...................................................................... 19
REVISION HISTORY
5/10—Rev. C to Rev. D
Deleted LFCSP CP-64-3 Package ..................................... Universal
Changes to output_phase Register, Table 16 ............................... 33
Deleted Figure 85; Renumbered Sequentially ............................ 55
Updated Outline Dimensions ....................................................... 55
Changes to Ordering Guide .......................................................... 55
12/09—Rev. B to Rev. C
Updated Outline Dimensions ....................................................... 55
Changes to Ordering Guide .......................................................... 56
7/09—Rev. A to Rev. B
Changes to Figure 5 ........................................................................ 10
Changes to Figure 49 and Figure 50 ............................................. 21
Changes to Figure 63 and Figure 64 ............................................. 28
Updated Outline Dimensions ....................................................... 55
12/07—Rev. 0 to Rev. A
Changes to Features .......................................................................... 1
Changes to Figure 1 .......................................................................... 1
Changes to Crosstalk Parameter ..................................................... 3
Changes to Logic Output (SDIO/ODM) ....................................... 5
Changes to Figure 2 to Figure 4 ...................................................... 7
Changes to Figure 59 ...................................................................... 24
Changes to Table 9 Endnote .......................................................... 26
Changes to Digital Outputs and Timing Section ....................... 27
AC Specifications .......................................................................... 4
Digital Specifications ................................................................... 5
Switching Specifications .............................................................. 6
Timing Diagrams .......................................................................... 7
Thermal Impedance ..................................................................... 9
ESD Caution .................................................................................. 9
Analog Input Considerations .................................................... 19
Rev. D | Page 2 of 56
Serial Port Interface (SPI) .............................................................. 30
Memory Map .................................................................................. 32
Applications Information .............................................................. 35
Evaluation Board ............................................................................ 36
Outline Dimensions ....................................................................... 55
Added Table 10 ............................................................................... 27
Changes to Table 11 and Table 12 ................................................ 27
Changes to RBIAS Pin Section ..................................................... 28
Deleted Figure 63 to Figure 66...................................................... 28
Moved Figure 65 ............................................................................. 28
Changes to Serial Port Interface (SPI) Section ........................... 30
Changes to Hardware Interface Section ...................................... 30
Changes to Table 15 ....................................................................... 31
Changes to Reading the Memory Map Table Section ............... 32
Added Applications Information and Design Guidelines
Sections ............................................................................................ 35
Changes to Input Signals Section ................................................. 36
Changes to Output Signals Section .............................................. 36
Changes to Figure 70 ...................................................................... 36
Changes to Default Operation and Jumper Selection Settings
Section .............................................................................................. 37
Changes to Alternative Analog Input Drive Configuration
Section .............................................................................................. 38
Changes to Figure 73 ...................................................................... 38
Change to Figure 75 ....................................................................... 40
Changes to Figure 76 ...................................................................... 41
Changes to Figure 80 ...................................................................... 45
Changes to Table 17 ....................................................................... 52
Updated Outline Dimensions ....................................................... 55
Changes to Ordering Guide .......................................................... 55
10/06—Revision 0: Initial Version
Clock Input Considerations ...................................................... 22
Hardware Interface ..................................................................... 30
Reading the Memory Map Table .............................................. 32
Reserved Locations .................................................................... 32
Default Values ............................................................................. 32
Logic Levels ................................................................................. 32
Design Guidelines ...................................................................... 35
Power Supplies ............................................................................ 36
Input Signals................................................................................ 36
Output Signals ............................................................................ 36
Default Operation and Jumper Selection Settings ................. 37
Alternative Analog Input Drive Configuration...................... 38
Ordering Guide .......................................................................... 55