AD8348ARU Analog Devices Inc, AD8348ARU Datasheet - Page 27

no-image

AD8348ARU

Manufacturer Part Number
AD8348ARU
Description
IF QUADRATURE DEMODULATOR
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8348ARU

Rohs Compliant
NO
Rohs Status
RoHS non-compliant
Function
Demodulator
Lo Frequency
100MHz ~ 2GHz
Rf Frequency
50MHz ~ 1GHz
P1db
-22dBm
Gain
25.5dB
Noise Figure
10.75dB
Current - Supply
58mA
Voltage - Supply
2.7 V ~ 5.5 V
Package / Case
28-TSSOP
Lead Free Status / RoHS Status

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8348ARU
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD8348ARUZ
Manufacturer:
AD
Quantity:
4 130
Part Number:
AD8348ARUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD8348ARUZ-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Table 6. Evaluation Board Configuration Options
Component
V
SW11, ENBL
SW13, R15,
SW12
IFIP, R31, R32
MXIP, MXIN,
LK11, VCMO
C8, C9, R4, R5
C10 (I and Q)
C1 to C7,
LK5 (I and Q)
Table 7. Filter-Jumper Configuration Options
Condition
xMXO to xAIN Directly
xMXO to xAIN via Filter
xMXO to J1x Directly, xAIN Unused
xMXO to J1x via Filter, xAIN Unused
Drive xAIN from J1x
S
, GND
VGIN
T41,
R41, R42,
C42, C43
(I and Q)
R1, R2,
L1 to L3
(I and Q)
Function
Power supply and ground vector pins.
Device enable: Place SW11 in the ENBL position to connect the ENBL pin to V
the DENBL position to disable the device by grounding the Pin ENBL through a 50 Ω pull-down
resistor. The device can also be enabled via an external voltage applied to ENBL or VENB.
Gain control selection: With SW13 in the POT position, the gain of the VGA can be set using the
R15 potentiometer. With SW13 in the EXT position, the VGA gain can be set by an external
voltage to the SMA connector VGIN. For VGA operation, the VGA must first be enabled by
setting SW12 to the IF position.
VGA enable selection: With SW12 in the IF position, the ENVG pin is connected to V
VGA is enabled. The IF input should be used when SW12 is in the IF position. With SW12 in the
MX position, the ENVG pin is grounded and the VGA is disabled. The MX inputs should be used
when SW12 is in the MX position.
IF inputs: The single-ended IF signal should be connected to this SMA connector. R31 and R32
form an L pad that presents a 50 Ω termination to the driving source. This L pad introduces an
11.46 dB loss in the input signal path and should be taken into consideration when calculating
the gain of the AD8348.
Mixer inputs: These inputs can be configured for either differential or single-ended operation.
The evaluation board is by default set for differential MX drive through a balun (T41) from a
single-ended source fed into the MXIP SMA connector. To change to a differential driving source,
T41 should be removed along with Resistor R42. The 0 Ω Resistors R43 and R44 should be installed in
place of T41 to bridge the gap between the input traces. This will present a nominal differential
impedance of 200 Ω (100 Ω per side). The differential inputs should then be fed into SMA
connectors MXIP and MXIN.
Baseband amplifier output bias: Installing LK11 connects VREF to VCMO. This sets the bias level
on the baseband amplifiers to VREF, which is equal to approximately 1 V. Alternatively, with
LK11 removed, the bias level of the baseband amplifiers can be set by applying an external
voltage to the VCMO test point.
Baseband amplifier outputs and output filter: Additional low-pass filtering can be provided at
the baseband output with these filters.
Mixer output dc-blocking capacitors: The mixer outputs are biased to VCMO. To prevent
damage to test equipment that cannot tolerate dc biases, C10 is provided to block the dc
component, thus protecting the test equipment.
Baseband filter: These components are provided for baseband filtering between the mixer
outputs and the baseband amplifier inputs. The baseband amplifier input impedance is high
and the filter termination impedance is set by R2. See Table 7 for the jumper settings.
Offset compensation loop disable: Installing these jumpers will disable the offset compensation
loop for the corresponding channel.
Rev. A | Page 27 of 28
LK1x
S
LK2x
. Place SW11 in
S
and the
LK3x
Default Condition
Not applicable
SW11 = ENBL
SW13 = POT
SW12 = IF
R31 = 57.6 Ω
R32 = 174 Ω
T41 = M/A-COM ETK4-2T;
R41= OPEN; C42, C43 =
1000 pF; R42 = 0 Ω
LK11 installed
R4, R5 = 0 Ω
C10 = 0 Ω
All = OPEN
LK5x = OPEN
LK4x
AD8348

Related parts for AD8348ARU